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Searched refs:clksor (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dga102.c38 u32 clksor = 0x00000000; in ga102_sor_dp_links() local
41 case 0x06: clksor |= 0x00000000; break; in ga102_sor_dp_links()
42 case 0x0a: clksor |= 0x00040000; break; in ga102_sor_dp_links()
43 case 0x14: clksor |= 0x00080000; break; in ga102_sor_dp_links()
44 case 0x1e: clksor |= 0x000c0000; break; in ga102_sor_dp_links()
45 case 0x08: clksor |= 0x00100000; break; in ga102_sor_dp_links()
46 case 0x09: clksor |= 0x00140000; break; in ga102_sor_dp_links()
47 case 0x0c: clksor |= 0x00180000; break; in ga102_sor_dp_links()
48 case 0x10: clksor |= 0x001c0000; break; in ga102_sor_dp_links()
60 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); in ga102_sor_dp_links()
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H A Dg94.c127 u32 clksor = 0x00000000; in g94_sor_dp_links() local
133 clksor |= 0x00040000; in g94_sor_dp_links()
135 nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor); in g94_sor_dp_links()
177 u32 clksor; in g94_sor_war_update_sppll1() local
183 clksor = nvkm_rd32(device, 0x614300 + nv50_ior_base(ior)); in g94_sor_war_update_sppll1()
184 switch (clksor & 0x03000000) { in g94_sor_war_update_sppll1()
H A Dtu102.c49 u32 clksor = 0x00000000; in tu102_sor_dp_links() local
51 clksor |= sor->dp.bw << 18; in tu102_sor_dp_links()
58 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); in tu102_sor_dp_links()
H A Dgf119.c177 u32 clksor = 0x00000000; in gf119_sor_dp_links() local
179 clksor |= sor->dp.bw << 18; in gf119_sor_dp_links()
186 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); in gf119_sor_dp_links()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dsortu102.c44 u32 clksor = 0x00000000; in tu102_sor_dp_links() local
46 clksor |= sor->dp.bw << 18; in tu102_sor_dp_links()
53 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); in tu102_sor_dp_links()
H A Dsorg94.c109 u32 clksor = 0x00000000; in g94_sor_dp_links() local
115 clksor |= 0x00040000; in g94_sor_dp_links()
117 nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor); in g94_sor_dp_links()
145 u32 clksor; in g94_sor_war_update_sppll1() local
151 clksor = nvkm_rd32(device, 0x614300 + nv50_ior_base(ior)); in g94_sor_war_update_sppll1()
152 switch (clksor & 0x03000000) { in g94_sor_war_update_sppll1()
H A Dsorgf119.c105 u32 clksor = 0x00000000; in gf119_sor_dp_links() local
107 clksor |= sor->dp.bw << 18; in gf119_sor_dp_links()
114 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); in gf119_sor_dp_links()

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