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Searched refs:clk_period_ps (Results 1 - 5 of 5) sorted by relevance

/kernel/linux/linux-5.10/drivers/memory/samsung/
H A Dexynos5422-dmc.c1034 * @clk_period_ps: the period of the clock, known as tCK
1043 u32 clk_period_ps) in create_timings_aligned()
1048 if (clk_period_ps == 0) in create_timings_aligned()
1055 val = dmc->timings->tRFC / clk_period_ps; in create_timings_aligned()
1056 val += dmc->timings->tRFC % clk_period_ps ? 1 : 0; in create_timings_aligned()
1061 val = dmc->timings->tRRD / clk_period_ps; in create_timings_aligned()
1062 val += dmc->timings->tRRD % clk_period_ps ? 1 : 0; in create_timings_aligned()
1067 val = dmc->timings->tRPab / clk_period_ps; in create_timings_aligned()
1068 val += dmc->timings->tRPab % clk_period_ps ? 1 : 0; in create_timings_aligned()
1073 val = dmc->timings->tRCD / clk_period_ps; in create_timings_aligned()
1041 create_timings_aligned(struct exynos5_dmc *dmc, u32 *reg_timing_row, u32 *reg_timing_data, u32 *reg_timing_power, u32 clk_period_ps) create_timings_aligned() argument
1185 u32 freq_mhz, clk_period_ps; of_get_dram_timings() local
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/kernel/linux/linux-6.6/drivers/memory/samsung/
H A Dexynos5422-dmc.c1029 * @clk_period_ps: the period of the clock, known as tCK
1038 u32 clk_period_ps) in create_timings_aligned()
1043 if (clk_period_ps == 0) in create_timings_aligned()
1050 val = dmc->timings->tRFC / clk_period_ps; in create_timings_aligned()
1051 val += dmc->timings->tRFC % clk_period_ps ? 1 : 0; in create_timings_aligned()
1056 val = dmc->timings->tRRD / clk_period_ps; in create_timings_aligned()
1057 val += dmc->timings->tRRD % clk_period_ps ? 1 : 0; in create_timings_aligned()
1062 val = dmc->timings->tRPab / clk_period_ps; in create_timings_aligned()
1063 val += dmc->timings->tRPab % clk_period_ps ? 1 : 0; in create_timings_aligned()
1068 val = dmc->timings->tRCD / clk_period_ps; in create_timings_aligned()
1036 create_timings_aligned(struct exynos5_dmc *dmc, u32 *reg_timing_row, u32 *reg_timing_data, u32 *reg_timing_power, u32 clk_period_ps) create_timings_aligned() argument
1180 u32 freq_mhz, clk_period_ps; of_get_dram_timings() local
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/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_calendar.c287 u32 taxi_bw, clk_period_ps; in sparx5_dsm_calendar_calc() local
289 clk_period_ps = sparx5_clk_period(sparx5->coreclock); in sparx5_dsm_calendar_calc()
290 taxi_bw = 128 * 1000000 / clk_period_ps; in sparx5_dsm_calendar_calc()
291 slow_mode = !!(clk_period_ps > 2000); in sparx5_dsm_calendar_calc()
365 (adjusted_speed * clk_period_ps); in sparx5_dsm_calendar_calc()
H A Dsparx5_port.c602 u32 clk_period_ps = 1600; /* 625Mhz for now */ in sparx5_port_fwd_urg() local
624 return urg / clk_period_ps - 1; in sparx5_port_fwd_urg()
/kernel/linux/linux-6.6/drivers/mmc/host/
H A Dsdhci-of-aspeed.c167 u64 clk_period_ps; in aspeed_sdhci_phase_to_tap() local
184 clk_period_ps = div_u64(PICOSECONDS_PER_SECOND, (u64)rate_hz); in aspeed_sdhci_phase_to_tap()
185 phase_period_ps = div_u64((u64)phase_deg * clk_period_ps, 360ULL); in aspeed_sdhci_phase_to_tap()

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