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Searched refs:clk_elem (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-stm32h7.c434 struct timer_ker *clk_elem = to_timer_ker(hw); in timer_ker_recalc_rate() local
436 u32 dppre_shift = clk_elem->dppre_shift; in timer_ker_recalc_rate()
698 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_is_enabled() local
699 struct clk_hw *_hw = &clk_elem->rgate.gate.hw; in pll_is_enabled()
708 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_enable() local
709 struct clk_hw *_hw = &clk_elem->rgate.gate.hw; in pll_enable()
718 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_disable() local
719 struct clk_hw *_hw = &clk_elem->rgate.gate.hw; in pll_disable()
728 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_frac_is_enabled() local
729 struct stm32_fractional_divider *fd = &clk_elem in pll_frac_is_enabled()
736 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_read_frac() local
746 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_fd_recalc_rate() local
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H A Dclk-stm32mp1.c751 struct stm32_pll_obj *clk_elem = to_pll(hw); in __pll_is_enabled() local
753 return readl_relaxed(clk_elem->reg) & PLL_ON; in __pll_is_enabled()
760 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_enable() local
766 spin_lock_irqsave(clk_elem->lock, flags); in pll_enable()
771 reg = readl_relaxed(clk_elem->reg); in pll_enable()
773 writel_relaxed(reg, clk_elem->reg); in pll_enable()
781 bit_status = !(readl_relaxed(clk_elem->reg) & PLL_RDY); in pll_enable()
789 spin_unlock_irqrestore(clk_elem->lock, flags); in pll_enable()
796 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_disable() local
800 spin_lock_irqsave(clk_elem in pll_disable()
811 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_frac_val() local
824 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_recalc_rate() local
848 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_is_enabled() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-stm32h7.c434 struct timer_ker *clk_elem = to_timer_ker(hw); in timer_ker_recalc_rate() local
436 u32 dppre_shift = clk_elem->dppre_shift; in timer_ker_recalc_rate()
697 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_is_enabled() local
698 struct clk_hw *_hw = &clk_elem->rgate.gate.hw; in pll_is_enabled()
707 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_enable() local
708 struct clk_hw *_hw = &clk_elem->rgate.gate.hw; in pll_enable()
717 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_disable() local
718 struct clk_hw *_hw = &clk_elem->rgate.gate.hw; in pll_disable()
727 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_frac_is_enabled() local
728 struct stm32_fractional_divider *fd = &clk_elem in pll_frac_is_enabled()
735 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_read_frac() local
745 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_fd_recalc_rate() local
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H A Dclk-stm32mp1.c767 struct stm32_pll_obj *clk_elem = to_pll(hw); in __pll_is_enabled() local
769 return readl_relaxed(clk_elem->reg) & PLL_ON; in __pll_is_enabled()
776 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_enable() local
782 spin_lock_irqsave(clk_elem->lock, flags); in pll_enable()
787 reg = readl_relaxed(clk_elem->reg); in pll_enable()
789 writel_relaxed(reg, clk_elem->reg); in pll_enable()
797 bit_status = !(readl_relaxed(clk_elem->reg) & PLL_RDY); in pll_enable()
805 spin_unlock_irqrestore(clk_elem->lock, flags); in pll_enable()
812 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_disable() local
816 spin_lock_irqsave(clk_elem in pll_disable()
827 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_frac_val() local
840 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_recalc_rate() local
864 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_is_enabled() local
877 struct stm32_pll_obj *clk_elem = to_pll(hw); pll_get_parent() local
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