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Searched refs:chid (Results 1 - 25 of 180) sorted by relevance

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/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dchid.c22 #include "chid.h"
25 nvkm_chid_put(struct nvkm_chid *chid, int id, spinlock_t *data_lock) in nvkm_chid_put() argument
28 spin_lock_irq(&chid->lock); in nvkm_chid_put()
30 chid->data[id] = NULL; in nvkm_chid_put()
32 clear_bit(id, chid->used); in nvkm_chid_put()
33 spin_unlock_irq(&chid->lock); in nvkm_chid_put()
38 nvkm_chid_get(struct nvkm_chid *chid, void *data) in nvkm_chid_get() argument
42 spin_lock_irq(&chid->lock); in nvkm_chid_get()
43 cid = find_first_zero_bit(chid->used, chid in nvkm_chid_get()
56 struct nvkm_chid *chid = container_of(kref, typeof(*chid), kref); nvkm_chid_del() local
67 struct nvkm_chid *chid = *pchid; nvkm_chid_unref() local
77 nvkm_chid_ref(struct nvkm_chid *chid) nvkm_chid_ref() argument
89 struct nvkm_chid *chid; nvkm_chid_new() local
[all...]
H A Drunl.c25 #include "chid.h"
185 struct nvkm_chid *chid = runl->chid; in nvkm_runl_chan_get_inst() local
190 spin_lock_irqsave(&chid->lock, flags); in nvkm_runl_chan_get_inst()
191 for_each_set_bit(id, chid->used, chid->nr) { in nvkm_runl_chan_get_inst()
192 chan = chid->data[id]; in nvkm_runl_chan_get_inst()
197 spin_unlock(&chid->lock); in nvkm_runl_chan_get_inst()
202 spin_unlock_irqrestore(&chid->lock, flags); in nvkm_runl_chan_get_inst()
209 struct nvkm_chid *chid in nvkm_runl_chan_get_chid() local
[all...]
H A Dnv04.c27 #include "chid.h"
49 u32 chid; in nv04_chan_stop() local
56 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & fifo->chid->mask; in nv04_chan_stop()
57 if (chid == chan->id) { in nv04_chan_stop()
80 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->chid->mask); in nv04_chan_stop()
274 nv04_fifo_swmthd(struct nvkm_device *device, u32 chid, u32 addr, u32 data) in nv04_fifo_swmthd() argument
293 handled = nvkm_sw_mthd(sw, chid, subc, mthd, data); in nv04_fifo_swmthd()
303 nv04_fifo_intr_cache_error(struct nvkm_fifo *fifo, u32 chid, u32 get) in nv04_fifo_intr_cache_error() argument
329 !nv04_fifo_swmthd(device, chid, mth in nv04_fifo_intr_cache_error()
354 nv04_fifo_intr_dma_pusher(struct nvkm_fifo *fifo, u32 chid) nv04_fifo_intr_dma_pusher() argument
413 u32 reassign, chid, get, sem; nv04_fifo_intr() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/core/
H A Dramht.c27 nvkm_ramht_hash(struct nvkm_ramht *ramht, int chid, u32 handle) in nvkm_ramht_hash() argument
36 hash ^= chid << (ramht->bits - 4); in nvkm_ramht_hash()
41 nvkm_ramht_search(struct nvkm_ramht *ramht, int chid, u32 handle) in nvkm_ramht_search() argument
45 co = ho = nvkm_ramht_hash(ramht, chid, handle); in nvkm_ramht_search()
47 if (ramht->data[co].chid == chid) { in nvkm_ramht_search()
61 int chid, int addr, u32 handle, u32 context) in nvkm_ramht_update()
68 data->chid = chid; in nvkm_ramht_update()
75 data->chid in nvkm_ramht_update()
60 nvkm_ramht_update(struct nvkm_ramht *ramht, int co, struct nvkm_object *object, int chid, int addr, u32 handle, u32 context) nvkm_ramht_update() argument
107 nvkm_ramht_insert(struct nvkm_ramht *ramht, struct nvkm_object *object, int chid, int addr, u32 handle, u32 context) nvkm_ramht_insert() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/core/
H A Dramht.c27 nvkm_ramht_hash(struct nvkm_ramht *ramht, int chid, u32 handle) in nvkm_ramht_hash() argument
36 hash ^= chid << (ramht->bits - 4); in nvkm_ramht_hash()
41 nvkm_ramht_search(struct nvkm_ramht *ramht, int chid, u32 handle) in nvkm_ramht_search() argument
45 co = ho = nvkm_ramht_hash(ramht, chid, handle); in nvkm_ramht_search()
47 if (ramht->data[co].chid == chid) { in nvkm_ramht_search()
61 int chid, int addr, u32 handle, u32 context) in nvkm_ramht_update()
68 data->chid = chid; in nvkm_ramht_update()
75 data->chid in nvkm_ramht_update()
60 nvkm_ramht_update(struct nvkm_ramht *ramht, int co, struct nvkm_object *object, int chid, int addr, u32 handle, u32 context) nvkm_ramht_update() argument
107 nvkm_ramht_insert(struct nvkm_ramht *ramht, struct nvkm_object *object, int chid, int addr, u32 handle, u32 context) nvkm_ramht_insert() argument
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dgp102.c31 gp102_disp_intr_error(struct nv50_disp *disp, int chid) in gp102_disp_intr_error() argument
35 u32 mthd = nvkm_rd32(device, 0x6111f0 + (chid * 12)); in gp102_disp_intr_error()
36 u32 data = nvkm_rd32(device, 0x6111f4 + (chid * 12)); in gp102_disp_intr_error()
37 u32 unkn = nvkm_rd32(device, 0x6111f8 + (chid * 12)); in gp102_disp_intr_error()
39 nvkm_error(subdev, "chid %d mthd %04x data %08x %08x %08x\n", in gp102_disp_intr_error()
40 chid, (mthd & 0x0000ffc), data, mthd, unkn); in gp102_disp_intr_error()
42 if (chid < ARRAY_SIZE(disp->chan)) { in gp102_disp_intr_error()
45 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR); in gp102_disp_intr_error()
52 nvkm_wr32(device, 0x61009c, (1 << chid)); in gp102_disp_intr_error()
53 nvkm_wr32(device, 0x6111f0 + (chid * 1 in gp102_disp_intr_error()
[all...]
H A Dgf119.c90 gf119_disp_intr_error(struct nv50_disp *disp, int chid) in gf119_disp_intr_error() argument
94 u32 stat = nvkm_rd32(device, 0x6101f0 + (chid * 12)); in gf119_disp_intr_error()
97 u32 data = nvkm_rd32(device, 0x6101f4 + (chid * 12)); in gf119_disp_intr_error()
98 u32 code = nvkm_rd32(device, 0x6101f8 + (chid * 12)); in gf119_disp_intr_error()
102 nvkm_error(subdev, "chid %d stat %08x reason %d [%s] mthd %04x " in gf119_disp_intr_error()
104 chid, stat, type, reason ? reason->name : "", in gf119_disp_intr_error()
107 if (chid < ARRAY_SIZE(disp->chan)) { in gf119_disp_intr_error()
110 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR); in gf119_disp_intr_error()
117 nvkm_wr32(device, 0x61009c, (1 << chid)); in gf119_disp_intr_error()
118 nvkm_wr32(device, 0x6101f0 + (chid * 1 in gf119_disp_intr_error()
132 int chid = __ffs(stat); stat &= ~(1 << chid); gf119_disp_intr() local
141 int chid = ffs(stat) - 1; gf119_disp_intr() local
[all...]
H A Ddmacnv50.c36 struct nv50_disp *disp, int chid, int head, u64 push, in nv50_disp_dmac_new_()
44 ret = nv50_disp_chan_new_(func, mthd, disp, chid, chid, head, oclass, in nv50_disp_dmac_new_()
74 chan->chid.user, -10, handle, in nv50_disp_dmac_bind()
75 chan->chid.user << 28 | in nv50_disp_dmac_bind()
76 chan->chid.user); in nv50_disp_dmac_bind()
84 int ctrl = chan->chid.ctrl; in nv50_disp_dmac_fini()
85 int user = chan->chid.user; in nv50_disp_dmac_fini()
106 int ctrl = chan->chid.ctrl; in nv50_disp_dmac_init()
107 int user = chan->chid in nv50_disp_dmac_init()
34 nv50_disp_dmac_new_(const struct nv50_disp_chan_func *func, const struct nv50_disp_chan_mthd *mthd, struct nv50_disp *disp, int chid, int head, u64 push, const struct nvkm_oclass *oclass, struct nvkm_object **pobject) nv50_disp_dmac_new_() argument
[all...]
H A Ddmacgv100.c31 const u32 soff = (chan->chid.ctrl - 1) * 0x04; in gv100_disp_dmac_idle()
45 chan->chid.user, -9, handle, in gv100_disp_dmac_bind()
46 chan->chid.user << 25 | 0x00000040); in gv100_disp_dmac_bind()
53 const u32 uoff = (chan->chid.ctrl - 1) * 0x1000; in gv100_disp_dmac_fini()
54 const u32 coff = chan->chid.ctrl * 0x04; in gv100_disp_dmac_fini()
66 const u32 uoff = (chan->chid.ctrl - 1) * 0x1000; in gv100_disp_dmac_init()
67 const u32 poff = chan->chid.ctrl * 0x10; in gv100_disp_dmac_init()
68 const u32 coff = chan->chid.ctrl * 0x04; in gv100_disp_dmac_init()
H A Ddmacgf119.c34 chan->chid.user, -9, handle, in gf119_disp_dmac_bind()
35 chan->chid.user << 27 | 0x00000001); in gf119_disp_dmac_bind()
43 int ctrl = chan->chid.ctrl; in gf119_disp_dmac_fini()
44 int user = chan->chid.user; in gf119_disp_dmac_fini()
65 int ctrl = chan->chid.ctrl; in gf119_disp_dmac_init()
66 int user = chan->chid.user; in gf119_disp_dmac_init()
H A Dchannv50.c89 mthd->name, chan->chid.user); in nv50_disp_chan_mthd()
125 nv50_disp_chan_uevent_send(struct nv50_disp *disp, int chid) in nv50_disp_chan_uevent_send() argument
130 nvkm_event_send(&disp->uevent, 1, chid, &rep, sizeof(rep)); in nv50_disp_chan_uevent_send()
146 notify->index = chan->chid.user; in nv50_disp_chan_uevent_ctor()
164 return 0x640000 + (chan->chid.user * 0x1000); in nv50_disp_chan_user()
171 const u32 mask = 0x00010001 << chan->chid.user; in nv50_disp_chan_intr()
172 const u32 data = en ? 0x00010000 << chan->chid.user : 0x00000000; in nv50_disp_chan_intr()
319 if (chan->chid.user >= 0) in nv50_disp_chan_dtor()
320 disp->chan[chan->chid.user] = NULL; in nv50_disp_chan_dtor()
354 chan->chid in nv50_disp_chan_new_()
[all...]
H A Dpiocgf119.c35 int ctrl = chan->chid.ctrl; in gf119_disp_pioc_fini()
36 int user = chan->chid.user; in gf119_disp_pioc_fini()
54 int ctrl = chan->chid.ctrl; in gf119_disp_pioc_init()
55 int user = chan->chid.user; in gf119_disp_pioc_init()
H A Dpiocnv50.c35 int ctrl = chan->chid.ctrl; in nv50_disp_pioc_fini()
36 int user = chan->chid.user; in nv50_disp_pioc_fini()
54 int ctrl = chan->chid.ctrl; in nv50_disp_pioc_init()
55 int user = chan->chid.user; in nv50_disp_pioc_init()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dgp102.c38 int ctrl = chan->chid.ctrl; in gp102_disp_dmac_init()
39 int user = chan->chid.user; in gp102_disp_dmac_init()
148 gp102_disp_intr_error(struct nvkm_disp *disp, int chid) in gp102_disp_intr_error() argument
152 u32 mthd = nvkm_rd32(device, 0x6111f0 + (chid * 12)); in gp102_disp_intr_error()
153 u32 data = nvkm_rd32(device, 0x6111f4 + (chid * 12)); in gp102_disp_intr_error()
154 u32 unkn = nvkm_rd32(device, 0x6111f8 + (chid * 12)); in gp102_disp_intr_error()
156 nvkm_error(subdev, "chid %d mthd %04x data %08x %08x %08x\n", in gp102_disp_intr_error()
157 chid, (mthd & 0x0000ffc), data, mthd, unkn); in gp102_disp_intr_error()
159 if (chid < ARRAY_SIZE(disp->chan)) { in gp102_disp_intr_error()
162 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERRO in gp102_disp_intr_error()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Ddmanv40.c68 int chid; in nv40_fifo_dma_engine_fini() local
76 chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1); in nv40_fifo_dma_engine_fini()
77 if (chid == chan->base.chid) in nv40_fifo_dma_engine_fini()
98 int chid; in nv40_fifo_dma_engine_init() local
107 chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1); in nv40_fifo_dma_engine_init()
108 if (chid == chan->base.chid) in nv40_fifo_dma_engine_init()
148 u32 context = chan->base.chid << 23; in nv40_fifo_dma_object_ctor()
163 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, in nv40_fifo_dma_object_ctor()
[all...]
H A Ddmanv04.c52 u32 context = 0x80000000 | chan->base.chid << 24; in nv04_fifo_dma_object_ctor()
67 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4, in nv04_fifo_dma_object_ctor()
84 u32 chid; in nv04_fifo_dma_fini() local
91 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & mask; in nv04_fifo_dma_fini()
92 if (chid == chan->base.chid) { in nv04_fifo_dma_fini()
121 nvkm_mask(device, NV04_PFIFO_MODE, 1 << chan->base.chid, 0); in nv04_fifo_dma_fini()
132 u32 mask = 1 << chan->base.chid; in nv04_fifo_dma_init()
202 args->v0.chid = chan->base.chid; in nv04_fifo_dma_new()
[all...]
H A Dnv04.c108 nv04_fifo_swmthd(struct nvkm_device *device, u32 chid, u32 addr, u32 data) in nv04_fifo_swmthd() argument
127 handled = nvkm_sw_mthd(sw, chid, subc, mthd, data); in nv04_fifo_swmthd()
137 nv04_fifo_cache_error(struct nv04_fifo *fifo, u32 chid, u32 get) in nv04_fifo_cache_error() argument
163 !nv04_fifo_swmthd(device, chid, mthd, data)) { in nv04_fifo_cache_error()
164 chan = nvkm_fifo_chan_chid(&fifo->base, chid, &flags); in nv04_fifo_cache_error()
167 chid, chan ? chan->object.client->name : "unknown", in nv04_fifo_cache_error()
188 nv04_fifo_dma_pusher(struct nv04_fifo *fifo, u32 chid) in nv04_fifo_dma_pusher() argument
200 chan = nvkm_fifo_chan_chid(&fifo->base, chid, &flags); in nv04_fifo_dma_pusher()
211 chid, name, ho_get, dma_get, ho_put, dma_put, in nv04_fifo_dma_pusher()
226 chid, nam in nv04_fifo_dma_pusher()
247 u32 reassign, chid, get, sem; nv04_fifo_intr() local
[all...]
H A Dgpfifogk104.c50 nvkm_wr32(device, 0x002634, chan->base.chid); in gk104_fifo_gpfifo_kick_locked()
57 cgrp ? cgrp->id : chan->base.chid, client->name); in gk104_fifo_gpfifo_kick_locked()
58 nvkm_fifo_recover_chan(&fifo->base, chan->base.chid); in gk104_fifo_gpfifo_kick_locked()
189 u32 coff = chan->base.chid * 8; in gk104_fifo_gpfifo_fini()
208 u32 coff = chan->base.chid * 8; in gk104_fifo_gpfifo_init()
243 gk104_fifo_gpfifo_new_(struct gk104_fifo *fifo, u64 *runlists, u16 *chid, in gk104_fifo_gpfifo_new_() argument
282 *chid = chan->base.chid; in gk104_fifo_gpfifo_new_()
291 chan->cgrp->id = chan->base.chid; in gk104_fifo_gpfifo_new_()
298 usermem = chan->base.chid * in gk104_fifo_gpfifo_new_()
[all...]
H A Dchannv50.c81 chan->base.chid, chan->base.object.client->name); in nv50_fifo_chan_engine_fini()
184 u32 chid = chan->base.chid; in nv50_fifo_chan_fini() local
187 nvkm_mask(device, 0x002600 + (chid * 4), 0x80000000, 0x00000000); in nv50_fifo_chan_fini()
189 nvkm_wr32(device, 0x002600 + (chid * 4), 0x00000000); in nv50_fifo_chan_fini()
199 u32 chid = chan->base.chid; in nv50_fifo_chan_init() local
201 nvkm_wr32(device, 0x002600 + (chid * 4), 0x80000000 | addr); in nv50_fifo_chan_init()
H A Dbase.c37 nvkm_fifo_recover_chan(struct nvkm_fifo *fifo, int chid) in nvkm_fifo_recover_chan() argument
43 fifo->func->recover_chan(fifo, chid); in nvkm_fifo_recover_chan()
105 nvkm_fifo_chan_chid(struct nvkm_fifo *fifo, int chid, unsigned long *rflags) in nvkm_fifo_chan_chid() argument
111 if (chan->chid == chid) { in nvkm_fifo_chan_chid()
123 nvkm_fifo_kevent(struct nvkm_fifo *fifo, int chid) in nvkm_fifo_kevent() argument
125 nvkm_event_send(&fifo->kevent, 1, chid, NULL, 0); in nvkm_fifo_kevent()
136 notify->index = chan->chid; in nvkm_fifo_kevent_ctor()
H A Dgpfifogv100.c34 return chan->chid; in gv100_fifo_gpfifo_submit_token()
124 struct gk104_fifo *fifo, u64 *runlists, u16 *chid, in gv100_fifo_gpfifo_new_()
161 *chid = chan->base.chid; in gv100_fifo_gpfifo_new_()
171 chan->cgrp->id = chan->base.chid; in gv100_fifo_gpfifo_new_()
178 usermem = chan->base.chid * 0x200; in gv100_fifo_gpfifo_new_()
213 nvkm_wo32(chan->base.inst, 0x0e8, chan->base.chid); in gv100_fifo_gpfifo_new_()
244 &args->v0.chid, in gv100_fifo_gpfifo_new()
123 gv100_fifo_gpfifo_new_(const struct nvkm_fifo_chan_func *func, struct gk104_fifo *fifo, u64 *runlists, u16 *chid, u64 vmm, u64 ioffset, u64 ilength, u64 *inst, bool priv, u32 *token, const struct nvkm_oclass *oclass, struct nvkm_object **pobject) gv100_fifo_gpfifo_new_() argument
/kernel/linux/linux-6.6/drivers/dma/qcom/
H A Dgpi.c91 #define GPII_n_CH_CMD(opcode, chid) \
93 FIELD_PREP(GPII_n_CH_CMD_CHID, chid))
140 #define GPII_n_EV_CMD(opcode, chid) \
142 FIELD_PREP(GPII_n_EV_CMD_CHID, chid))
246 u8 chid; member
257 u8 chid; member
267 u8 chid; member
487 u32 chid; member
689 u32 chid = MAX_CHANNELS_PER_GPII; in gpi_send_cmd() local
697 chid in gpi_send_cmd()
768 u32 chid, state; gpi_process_ch_ctrl_irq() local
939 u32 chid; gpi_process_imed_data_event() local
1021 u32 chid; gpi_process_xfer_compl_event() local
1097 u32 chid, type; gpi_process_events() local
1183 u32 chid = gpi_event->xfer_compl_event.chid; gpi_mark_stale_events() local
1274 u32 chid = chan->chid; gpi_alloc_chan() local
2113 u32 seid, chid; gpi_of_dma_xlate() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv20.c24 nvkm_wo32(gr->ctxtab, chan->chid * 4, inst >> 4); in nv20_gr_chan_init()
36 int chid = -1; in nv20_gr_chan_fini() local
40 chid = (nvkm_rd32(device, 0x400148) & 0x1f000000) >> 24; in nv20_gr_chan_fini()
41 if (chan->chid == chid) { in nv20_gr_chan_fini()
54 nvkm_wo32(gr->ctxtab, chan->chid * 4, 0x00000000); in nv20_gr_chan_fini()
86 chan->chid = fifoch->chid; in nv20_gr_chan_new()
96 nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24)); in nv20_gr_chan_new()
190 u32 chid in nv20_gr_intr() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dramht.h9 int chid; member
26 int chid, int addr, u32 handle, u32 context);
29 nvkm_ramht_search(struct nvkm_ramht *, int chid, u32 handle);
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dramht.h9 int chid; member
26 int chid, int addr, u32 handle, u32 context);
29 nvkm_ramht_search(struct nvkm_ramht *, int chid, u32 handle);

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