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Searched refs:ccctlr (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-cfg.c62 CHECKREG(TRCCCCTLR, ccctlr); in etm4_cfg_map_reg_offset()
H A Dcoresight-etm4x-core.c447 etm4x_relaxed_write32(csa, config->ccctlr, TRCCCCTLR); in etm4_enable_hw()
670 config->ccctlr = ETM_CYC_THRESHOLD_DEFAULT; in etm4_parse_event_config()
H A Dcoresight-etm4x-sysfs.c654 val = config->ccctlr; in cyc_threshold_show()
674 config->ccctlr = val; in cyc_threshold_store()
H A Dcoresight-etm4x.h807 * @ccctlr: Sets the threshold value for cycle counting.
852 u32 ccctlr; member
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
H A Dcoresight-etm4x.h219 * @ccctlr: Sets the threshold value for cycle counting.
264 u32 ccctlr; member
H A Dcoresight-etm4x-core.c138 writel_relaxed(config->ccctlr, drvdata->base + TRCCCCTLR); in etm4_enable_hw()
361 config->ccctlr = ETM_CYC_THRESHOLD_DEFAULT; in etm4_parse_event_config()
H A Dcoresight-etm4x-sysfs.c645 val = config->ccctlr; in cyc_threshold_show()
665 config->ccctlr = val; in cyc_threshold_store()

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