Searched refs:cb_color_bo_offset (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | r600_cs.c | 51 u64 cb_color_bo_offset[8]; member
313 track->cb_color_bo_offset[i] = 0xFFFFFFFF; in r600_cs_track_init()
379 base_offset = track->cb_color_bo_mc[i] + track->cb_color_bo_offset[i]; in r600_cs_track_validate_cb()
442 if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) { in r600_cs_track_validate_cb()
453 track->cb_color_bo_offset[i], tmp, in r600_cs_track_validate_cb()
1203 track->cb_color_frag_offset[tmp] = track->cb_color_bo_offset[tmp]; in r600_cs_check_reg()
1234 track->cb_color_tile_offset[tmp] = track->cb_color_bo_offset[tmp]; in r600_cs_check_reg()
1279 track->cb_color_bo_offset[tmp] = (u64)radeon_get_ib_value(p, idx) << 8; in r600_cs_check_reg()
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| H A D | evergreen_cs.c | 50 u32 cb_color_bo_offset[12]; member
131 track->cb_color_bo_offset[i] = 0xFFFFFFFF; in evergreen_cs_track_init()
437 offset = track->cb_color_bo_offset[id] << 8; in evergreen_cs_track_validate_cb()
459 tmp = track->cb_color_bo_offset[id] << 8; in evergreen_cs_track_validate_cb()
482 track->cb_color_bo_offset[id] << 8, mslice, in evergreen_cs_track_validate_cb()
1562 track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx); in evergreen_cs_handle_reg()
1578 track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx); in evergreen_cs_handle_reg()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | r600_cs.c | 50 u64 cb_color_bo_offset[8]; member
312 track->cb_color_bo_offset[i] = 0xFFFFFFFF; in r600_cs_track_init()
378 base_offset = track->cb_color_bo_mc[i] + track->cb_color_bo_offset[i]; in r600_cs_track_validate_cb()
441 if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) { in r600_cs_track_validate_cb()
452 track->cb_color_bo_offset[i], tmp, in r600_cs_track_validate_cb()
1202 track->cb_color_frag_offset[tmp] = track->cb_color_bo_offset[tmp]; in r600_cs_check_reg()
1233 track->cb_color_tile_offset[tmp] = track->cb_color_bo_offset[tmp]; in r600_cs_check_reg()
1278 track->cb_color_bo_offset[tmp] = (u64)radeon_get_ib_value(p, idx) << 8; in r600_cs_check_reg()
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| H A D | evergreen_cs.c | 49 u32 cb_color_bo_offset[12]; member
130 track->cb_color_bo_offset[i] = 0xFFFFFFFF; in evergreen_cs_track_init()
436 offset = track->cb_color_bo_offset[id] << 8; in evergreen_cs_track_validate_cb()
458 tmp = track->cb_color_bo_offset[id] << 8; in evergreen_cs_track_validate_cb()
481 track->cb_color_bo_offset[id] << 8, mslice, in evergreen_cs_track_validate_cb()
1561 track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx); in evergreen_cs_handle_reg()
1577 track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx); in evergreen_cs_handle_reg()
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