| /kernel/linux/linux-5.10/arch/mips/include/asm/octeon/ |
| H A D | cvmx-ciu2-defs.h | 31 #define CVMX_CIU2_ACK_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0000ull) + ((block_id) & 31) * 0x200000ull)
32 #define CVMX_CIU2_ACK_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0200ull) + ((block_id) & 31) * 0x200000ull)
33 #define CVMX_CIU2_EN_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092000ull) + ((block_id) & 31) * 0x200000ull)
34 #define CVMX_CIU2_EN_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091000ull) + ((block_id) & 31) * 0x200000ull)
35 #define CVMX_CIU2_EN_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090000ull) + ((block_id)
[all...] |
| H A D | cvmx-pcsx-defs.h | 31 static inline uint64_t CVMX_PCSX_ANX_ADV_REG(unsigned long offset, unsigned long block_id) in CVMX_PCSX_ANX_ADV_REG() argument
35 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
38 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
42 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
44 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
46 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
49 static inline uint64_t CVMX_PCSX_ANX_EXT_ST_REG(unsigned long offset, unsigned long block_id) in CVMX_PCSX_ANX_EXT_ST_REG() argument
53 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
56 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
60 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * in CVMX_PCSX_ANX_EXT_ST_REG()
67 CVMX_PCSX_ANX_LP_ABIL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_ANX_LP_ABIL_REG() argument
85 CVMX_PCSX_ANX_RESULTS_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_ANX_RESULTS_REG() argument
103 CVMX_PCSX_INTX_EN_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_INTX_EN_REG() argument
121 CVMX_PCSX_INTX_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_INTX_REG() argument
139 CVMX_PCSX_LINKX_TIMER_COUNT_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_LINKX_TIMER_COUNT_REG() argument
157 CVMX_PCSX_LOG_ANLX_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_LOG_ANLX_REG() argument
175 CVMX_PCSX_MISCX_CTL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MISCX_CTL_REG() argument
193 CVMX_PCSX_MRX_CONTROL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MRX_CONTROL_REG() argument
211 CVMX_PCSX_MRX_STATUS_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MRX_STATUS_REG() argument
229 CVMX_PCSX_RXX_STATES_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_RXX_STATES_REG() argument
247 CVMX_PCSX_RXX_SYNC_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_RXX_SYNC_REG() argument
265 CVMX_PCSX_SGMX_AN_ADV_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_SGMX_AN_ADV_REG() argument
283 CVMX_PCSX_SGMX_LP_ADV_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_SGMX_LP_ADV_REG() argument
301 CVMX_PCSX_TXX_STATES_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_TXX_STATES_REG() argument
319 CVMX_PCSX_TX_RXX_POLARITY_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_TX_RXX_POLARITY_REG() argument
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| H A D | cvmx-pcsxx-defs.h | 31 static inline uint64_t CVMX_PCSXX_10GBX_STATUS_REG(unsigned long block_id) in CVMX_PCSXX_10GBX_STATUS_REG() argument
37 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x8000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
40 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x8000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
42 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x1000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
44 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x1000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
47 static inline uint64_t CVMX_PCSXX_BIST_STATUS_REG(unsigned long block_id) in CVMX_PCSXX_BIST_STATUS_REG() argument
53 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x8000000ull; in CVMX_PCSXX_BIST_STATUS_REG()
56 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x8000000ull; in CVMX_PCSXX_BIST_STATUS_REG()
58 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x1000000ull; in CVMX_PCSXX_BIST_STATUS_REG()
60 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * in CVMX_PCSXX_BIST_STATUS_REG()
63 CVMX_PCSXX_BIT_LOCK_STATUS_REG(unsigned long block_id) CVMX_PCSXX_BIT_LOCK_STATUS_REG() argument
79 CVMX_PCSXX_CONTROL1_REG(unsigned long block_id) CVMX_PCSXX_CONTROL1_REG() argument
95 CVMX_PCSXX_CONTROL2_REG(unsigned long block_id) CVMX_PCSXX_CONTROL2_REG() argument
111 CVMX_PCSXX_INT_EN_REG(unsigned long block_id) CVMX_PCSXX_INT_EN_REG() argument
127 CVMX_PCSXX_INT_REG(unsigned long block_id) CVMX_PCSXX_INT_REG() argument
143 CVMX_PCSXX_LOG_ANL_REG(unsigned long block_id) CVMX_PCSXX_LOG_ANL_REG() argument
159 CVMX_PCSXX_MISC_CTL_REG(unsigned long block_id) CVMX_PCSXX_MISC_CTL_REG() argument
175 CVMX_PCSXX_RX_SYNC_STATES_REG(unsigned long block_id) CVMX_PCSXX_RX_SYNC_STATES_REG() argument
191 CVMX_PCSXX_SPD_ABIL_REG(unsigned long block_id) CVMX_PCSXX_SPD_ABIL_REG() argument
207 CVMX_PCSXX_STATUS1_REG(unsigned long block_id) CVMX_PCSXX_STATUS1_REG() argument
223 CVMX_PCSXX_STATUS2_REG(unsigned long block_id) CVMX_PCSXX_STATUS2_REG() argument
239 CVMX_PCSXX_TX_RX_POLARITY_REG(unsigned long block_id) CVMX_PCSXX_TX_RX_POLARITY_REG() argument
255 CVMX_PCSXX_TX_RX_STATES_REG(unsigned long block_id) CVMX_PCSXX_TX_RX_STATES_REG() argument
[all...] |
| H A D | cvmx-asxx-defs.h | 31 #define CVMX_ASXX_GMII_RX_CLK_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000180ull))
32 #define CVMX_ASXX_GMII_RX_DAT_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000188ull))
33 #define CVMX_ASXX_INT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000018ull) + ((block_id) & 1) * 0x8000000ull)
34 #define CVMX_ASXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000010ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_ASXX_MII_RX_DAT_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000190ull))
36 #define CVMX_ASXX_PRT_LOOP(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000040ull) + ((block_id) & 1) * 0x8000000ull)
37 #define CVMX_ASXX_RLD_BYPASS(block_id) (CVMX_ADD_IO_SE
[all...] |
| H A D | cvmx-stxx-defs.h | 31 #define CVMX_STXX_ARB_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000608ull) + ((block_id) & 1) * 0x8000000ull)
32 #define CVMX_STXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000688ull) + ((block_id) & 1) * 0x8000000ull)
33 #define CVMX_STXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000600ull) + ((block_id) & 1) * 0x8000000ull)
34 #define CVMX_STXX_DIP_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000690ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_STXX_IGN_CAL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000610ull) + ((block_id)
[all...] |
| H A D | cvmx-gmxx-defs.h | 31 static inline uint64_t CVMX_GMXX_HG2_CONTROL(unsigned long block_id) in CVMX_GMXX_HG2_CONTROL() argument
35 return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x1000000ull; in CVMX_GMXX_HG2_CONTROL()
37 return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull; in CVMX_GMXX_HG2_CONTROL()
40 static inline uint64_t CVMX_GMXX_INF_MODE(unsigned long block_id) in CVMX_GMXX_INF_MODE() argument
44 return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x1000000ull; in CVMX_GMXX_INF_MODE()
46 return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; in CVMX_GMXX_INF_MODE()
49 static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long block_id) in CVMX_GMXX_PRTX_CFG() argument
53 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x0ull) * 2048; in CVMX_GMXX_PRTX_CFG()
55 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x2000ull) * 2048; in CVMX_GMXX_PRTX_CFG()
57 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * in CVMX_GMXX_PRTX_CFG()
60 CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM0() argument
71 CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM1() argument
82 CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM2() argument
93 CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM3() argument
104 CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM4() argument
115 CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM5() argument
126 CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM_EN() argument
137 CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CTL() argument
148 CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_FRM_CTL() argument
162 CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_INT_EN() argument
173 CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_INT_REG() argument
184 CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_JABBER() argument
197 CVMX_GMXX_RX_PRTS(unsigned long block_id) CVMX_GMXX_RX_PRTS() argument
206 CVMX_GMXX_RX_XAUI_CTL(unsigned long block_id) CVMX_GMXX_RX_XAUI_CTL() argument
215 CVMX_GMXX_SMACX(unsigned long offset, unsigned long block_id) CVMX_GMXX_SMACX() argument
226 CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_BURST() argument
238 CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_CTL() argument
249 CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL() argument
260 CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_PAUSE_PKT_TIME() argument
271 CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_SLOT() argument
282 CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_THRESH() argument
293 CVMX_GMXX_TX_INT_EN(unsigned long block_id) CVMX_GMXX_TX_INT_EN() argument
302 CVMX_GMXX_TX_INT_REG(unsigned long block_id) CVMX_GMXX_TX_INT_REG() argument
311 CVMX_GMXX_TX_OVR_BP(unsigned long block_id) CVMX_GMXX_TX_OVR_BP() argument
320 CVMX_GMXX_TX_PRTS(unsigned long block_id) CVMX_GMXX_TX_PRTS() argument
332 CVMX_GMXX_TX_XAUI_CTL(unsigned long block_id) CVMX_GMXX_TX_XAUI_CTL() argument
[all...] |
| H A D | cvmx-pemx-defs.h | 31 #define CVMX_PEMX_BAR1_INDEXX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C00000A8ull) + (((offset) & 15) + ((block_id) & 1) * 0x200000ull) * 8)
32 #define CVMX_PEMX_BAR2_MASK(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000130ull) + ((block_id) & 1) * 0x1000000ull)
33 #define CVMX_PEMX_BAR_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000128ull) + ((block_id) & 1) * 0x1000000ull)
34 #define CVMX_PEMX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000018ull) + ((block_id) & 1) * 0x1000000ull)
35 #define CVMX_PEMX_BIST_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000420ull) + ((block_id)
[all...] |
| H A D | cvmx-lmcx-defs.h | 31 #define CVMX_LMCX_BIST_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800880000F0ull) + ((block_id) & 1) * 0x60000000ull)
32 #define CVMX_LMCX_BIST_RESULT(block_id) (CVMX_ADD_IO_SEG(0x00011800880000F8ull) + ((block_id) & 1) * 0x60000000ull)
33 #define CVMX_LMCX_CHAR_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000220ull) + ((block_id) & 3) * 0x1000000ull)
34 #define CVMX_LMCX_CHAR_MASK0(block_id) (CVMX_ADD_IO_SEG(0x0001180088000228ull) + ((block_id) & 3) * 0x1000000ull)
35 #define CVMX_LMCX_CHAR_MASK1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000230ull) + ((block_id)
57 CVMX_LMCX_DUAL_MEMCFG(unsigned long block_id) CVMX_LMCX_DUAL_MEMCFG() argument
76 CVMX_LMCX_ECC_SYND(unsigned long block_id) CVMX_LMCX_ECC_SYND() argument
98 CVMX_LMCX_FADR(unsigned long block_id) CVMX_LMCX_FADR() argument
129 CVMX_LMCX_NXM(unsigned long block_id) CVMX_LMCX_NXM() argument
[all...] |
| H A D | cvmx-pescx-defs.h | 31 #define CVMX_PESCX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000018ull) + ((block_id) & 1) * 0x8000000ull)
32 #define CVMX_PESCX_BIST_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000418ull) + ((block_id) & 1) * 0x8000000ull)
33 #define CVMX_PESCX_CFG_RD(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000030ull) + ((block_id) & 1) * 0x8000000ull)
34 #define CVMX_PESCX_CFG_WR(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000028ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_PESCX_CPL_LUT_VALID(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000098ull) + ((block_id)
[all...] |
| H A D | cvmx-spxx-defs.h | 31 #define CVMX_SPXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000340ull) + ((block_id) & 1) * 0x8000000ull)
32 #define CVMX_SPXX_BIST_STAT(block_id) (CVMX_ADD_IO_SEG(0x00011800900007F8ull) + ((block_id) & 1) * 0x8000000ull)
33 #define CVMX_SPXX_CLK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000348ull) + ((block_id) & 1) * 0x8000000ull)
34 #define CVMX_SPXX_CLK_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000350ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_SPXX_DBG_DESKEW_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000368ull) + ((block_id)
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| H A D | cvmx-srxx-defs.h | 31 #define CVMX_SRXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000200ull) + ((block_id) & 1) * 0x8000000ull)
32 #define CVMX_SRXX_IGN_RX_FULL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000218ull) + ((block_id) & 1) * 0x8000000ull)
33 #define CVMX_SRXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000000ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8)
34 #define CVMX_SRXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000208ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_SRXX_SW_TICK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000220ull) + ((block_id)
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| H A D | cvmx-l2c-defs.h | 36 #define CVMX_L2C_ERR_TDTX(block_id) \
37 (CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x40000ull)
38 #define CVMX_L2C_ERR_TTGX(block_id) \
39 (CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x40000ull)
54 #define CVMX_L2C_TADX_PFCX(offset, block_id) \
56 ((block_id) & 7) * 0x8000ull) * 8)
57 #define CVMX_L2C_TADX_PFC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00400ull) + \
58 ((block_id) & 3) * 0x40000ull)
59 #define CVMX_L2C_TADX_PFC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00408ull) + \
60 ((block_id)
[all...] |
| /kernel/linux/linux-6.6/arch/mips/include/asm/octeon/ |
| H A D | cvmx-ciu2-defs.h | 31 #define CVMX_CIU2_ACK_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0000ull) + ((block_id) & 31) * 0x200000ull)
32 #define CVMX_CIU2_ACK_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0200ull) + ((block_id) & 31) * 0x200000ull)
33 #define CVMX_CIU2_EN_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092000ull) + ((block_id) & 31) * 0x200000ull)
34 #define CVMX_CIU2_EN_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091000ull) + ((block_id) & 31) * 0x200000ull)
35 #define CVMX_CIU2_EN_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090000ull) + ((block_id)
[all...] |
| H A D | cvmx-pcsx-defs.h | 31 static inline uint64_t CVMX_PCSX_ANX_ADV_REG(unsigned long offset, unsigned long block_id) in CVMX_PCSX_ANX_ADV_REG() argument
35 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
38 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
42 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
44 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
46 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
49 static inline uint64_t CVMX_PCSX_ANX_EXT_ST_REG(unsigned long offset, unsigned long block_id) in CVMX_PCSX_ANX_EXT_ST_REG() argument
53 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
56 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
60 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * in CVMX_PCSX_ANX_EXT_ST_REG()
67 CVMX_PCSX_ANX_LP_ABIL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_ANX_LP_ABIL_REG() argument
85 CVMX_PCSX_ANX_RESULTS_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_ANX_RESULTS_REG() argument
103 CVMX_PCSX_INTX_EN_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_INTX_EN_REG() argument
121 CVMX_PCSX_INTX_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_INTX_REG() argument
139 CVMX_PCSX_LINKX_TIMER_COUNT_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_LINKX_TIMER_COUNT_REG() argument
157 CVMX_PCSX_LOG_ANLX_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_LOG_ANLX_REG() argument
175 CVMX_PCSX_MISCX_CTL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MISCX_CTL_REG() argument
193 CVMX_PCSX_MRX_CONTROL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MRX_CONTROL_REG() argument
211 CVMX_PCSX_MRX_STATUS_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MRX_STATUS_REG() argument
229 CVMX_PCSX_RXX_STATES_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_RXX_STATES_REG() argument
247 CVMX_PCSX_RXX_SYNC_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_RXX_SYNC_REG() argument
265 CVMX_PCSX_SGMX_AN_ADV_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_SGMX_AN_ADV_REG() argument
283 CVMX_PCSX_SGMX_LP_ADV_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_SGMX_LP_ADV_REG() argument
301 CVMX_PCSX_TXX_STATES_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_TXX_STATES_REG() argument
319 CVMX_PCSX_TX_RXX_POLARITY_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_TX_RXX_POLARITY_REG() argument
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| H A D | cvmx-pcsxx-defs.h | 31 static inline uint64_t CVMX_PCSXX_10GBX_STATUS_REG(unsigned long block_id) in CVMX_PCSXX_10GBX_STATUS_REG() argument
37 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x8000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
40 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x8000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
42 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x1000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
44 return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x1000000ull; in CVMX_PCSXX_10GBX_STATUS_REG()
47 static inline uint64_t CVMX_PCSXX_BIST_STATUS_REG(unsigned long block_id) in CVMX_PCSXX_BIST_STATUS_REG() argument
53 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x8000000ull; in CVMX_PCSXX_BIST_STATUS_REG()
56 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x8000000ull; in CVMX_PCSXX_BIST_STATUS_REG()
58 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x1000000ull; in CVMX_PCSXX_BIST_STATUS_REG()
60 return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * in CVMX_PCSXX_BIST_STATUS_REG()
63 CVMX_PCSXX_BIT_LOCK_STATUS_REG(unsigned long block_id) CVMX_PCSXX_BIT_LOCK_STATUS_REG() argument
79 CVMX_PCSXX_CONTROL1_REG(unsigned long block_id) CVMX_PCSXX_CONTROL1_REG() argument
95 CVMX_PCSXX_CONTROL2_REG(unsigned long block_id) CVMX_PCSXX_CONTROL2_REG() argument
111 CVMX_PCSXX_INT_EN_REG(unsigned long block_id) CVMX_PCSXX_INT_EN_REG() argument
127 CVMX_PCSXX_INT_REG(unsigned long block_id) CVMX_PCSXX_INT_REG() argument
143 CVMX_PCSXX_LOG_ANL_REG(unsigned long block_id) CVMX_PCSXX_LOG_ANL_REG() argument
159 CVMX_PCSXX_MISC_CTL_REG(unsigned long block_id) CVMX_PCSXX_MISC_CTL_REG() argument
175 CVMX_PCSXX_RX_SYNC_STATES_REG(unsigned long block_id) CVMX_PCSXX_RX_SYNC_STATES_REG() argument
191 CVMX_PCSXX_SPD_ABIL_REG(unsigned long block_id) CVMX_PCSXX_SPD_ABIL_REG() argument
207 CVMX_PCSXX_STATUS1_REG(unsigned long block_id) CVMX_PCSXX_STATUS1_REG() argument
223 CVMX_PCSXX_STATUS2_REG(unsigned long block_id) CVMX_PCSXX_STATUS2_REG() argument
239 CVMX_PCSXX_TX_RX_POLARITY_REG(unsigned long block_id) CVMX_PCSXX_TX_RX_POLARITY_REG() argument
255 CVMX_PCSXX_TX_RX_STATES_REG(unsigned long block_id) CVMX_PCSXX_TX_RX_STATES_REG() argument
[all...] |
| H A D | cvmx-asxx-defs.h | 31 #define CVMX_ASXX_GMII_RX_CLK_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000180ull))
32 #define CVMX_ASXX_GMII_RX_DAT_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000188ull))
33 #define CVMX_ASXX_INT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000018ull) + ((block_id) & 1) * 0x8000000ull)
34 #define CVMX_ASXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000010ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_ASXX_MII_RX_DAT_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000190ull))
36 #define CVMX_ASXX_PRT_LOOP(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000040ull) + ((block_id) & 1) * 0x8000000ull)
37 #define CVMX_ASXX_RLD_BYPASS(block_id) (CVMX_ADD_IO_SE
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| H A D | cvmx-stxx-defs.h | 31 #define CVMX_STXX_ARB_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000608ull) + ((block_id) & 1) * 0x8000000ull)
32 #define CVMX_STXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000688ull) + ((block_id) & 1) * 0x8000000ull)
33 #define CVMX_STXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000600ull) + ((block_id) & 1) * 0x8000000ull)
34 #define CVMX_STXX_DIP_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000690ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_STXX_IGN_CAL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000610ull) + ((block_id)
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| H A D | cvmx-gmxx-defs.h | 31 static inline uint64_t CVMX_GMXX_HG2_CONTROL(unsigned long block_id) in CVMX_GMXX_HG2_CONTROL() argument
35 return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x1000000ull; in CVMX_GMXX_HG2_CONTROL()
37 return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull; in CVMX_GMXX_HG2_CONTROL()
40 static inline uint64_t CVMX_GMXX_INF_MODE(unsigned long block_id) in CVMX_GMXX_INF_MODE() argument
44 return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x1000000ull; in CVMX_GMXX_INF_MODE()
46 return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; in CVMX_GMXX_INF_MODE()
49 static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long block_id) in CVMX_GMXX_PRTX_CFG() argument
53 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x0ull) * 2048; in CVMX_GMXX_PRTX_CFG()
55 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x2000ull) * 2048; in CVMX_GMXX_PRTX_CFG()
57 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * in CVMX_GMXX_PRTX_CFG()
60 CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM0() argument
71 CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM1() argument
82 CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM2() argument
93 CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM3() argument
104 CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM4() argument
115 CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM5() argument
126 CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CAM_EN() argument
137 CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_ADR_CTL() argument
148 CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_FRM_CTL() argument
162 CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_INT_EN() argument
173 CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_INT_REG() argument
184 CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long block_id) CVMX_GMXX_RXX_JABBER() argument
197 CVMX_GMXX_RX_PRTS(unsigned long block_id) CVMX_GMXX_RX_PRTS() argument
206 CVMX_GMXX_RX_XAUI_CTL(unsigned long block_id) CVMX_GMXX_RX_XAUI_CTL() argument
215 CVMX_GMXX_SMACX(unsigned long offset, unsigned long block_id) CVMX_GMXX_SMACX() argument
226 CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_BURST() argument
238 CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_CTL() argument
249 CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL() argument
260 CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_PAUSE_PKT_TIME() argument
271 CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_SLOT() argument
282 CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long block_id) CVMX_GMXX_TXX_THRESH() argument
293 CVMX_GMXX_TX_INT_EN(unsigned long block_id) CVMX_GMXX_TX_INT_EN() argument
302 CVMX_GMXX_TX_INT_REG(unsigned long block_id) CVMX_GMXX_TX_INT_REG() argument
311 CVMX_GMXX_TX_OVR_BP(unsigned long block_id) CVMX_GMXX_TX_OVR_BP() argument
320 CVMX_GMXX_TX_PRTS(unsigned long block_id) CVMX_GMXX_TX_PRTS() argument
332 CVMX_GMXX_TX_XAUI_CTL(unsigned long block_id) CVMX_GMXX_TX_XAUI_CTL() argument
[all...] |
| H A D | cvmx-pemx-defs.h | 31 #define CVMX_PEMX_BAR1_INDEXX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C00000A8ull) + (((offset) & 15) + ((block_id) & 1) * 0x200000ull) * 8)
32 #define CVMX_PEMX_BAR2_MASK(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000130ull) + ((block_id) & 1) * 0x1000000ull)
33 #define CVMX_PEMX_BAR_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000128ull) + ((block_id) & 1) * 0x1000000ull)
34 #define CVMX_PEMX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000018ull) + ((block_id) & 1) * 0x1000000ull)
35 #define CVMX_PEMX_BIST_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000420ull) + ((block_id)
[all...] |
| H A D | cvmx-lmcx-defs.h | 31 #define CVMX_LMCX_BIST_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800880000F0ull) + ((block_id) & 1) * 0x60000000ull)
32 #define CVMX_LMCX_BIST_RESULT(block_id) (CVMX_ADD_IO_SEG(0x00011800880000F8ull) + ((block_id) & 1) * 0x60000000ull)
33 #define CVMX_LMCX_CHAR_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000220ull) + ((block_id) & 3) * 0x1000000ull)
34 #define CVMX_LMCX_CHAR_MASK0(block_id) (CVMX_ADD_IO_SEG(0x0001180088000228ull) + ((block_id) & 3) * 0x1000000ull)
35 #define CVMX_LMCX_CHAR_MASK1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000230ull) + ((block_id)
57 CVMX_LMCX_DUAL_MEMCFG(unsigned long block_id) CVMX_LMCX_DUAL_MEMCFG() argument
76 CVMX_LMCX_ECC_SYND(unsigned long block_id) CVMX_LMCX_ECC_SYND() argument
98 CVMX_LMCX_FADR(unsigned long block_id) CVMX_LMCX_FADR() argument
129 CVMX_LMCX_NXM(unsigned long block_id) CVMX_LMCX_NXM() argument
[all...] |
| H A D | cvmx-spxx-defs.h | 31 #define CVMX_SPXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000340ull) + ((block_id) & 1) * 0x8000000ull)
32 #define CVMX_SPXX_BIST_STAT(block_id) (CVMX_ADD_IO_SEG(0x00011800900007F8ull) + ((block_id) & 1) * 0x8000000ull)
33 #define CVMX_SPXX_CLK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000348ull) + ((block_id) & 1) * 0x8000000ull)
34 #define CVMX_SPXX_CLK_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000350ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_SPXX_DBG_DESKEW_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000368ull) + ((block_id)
[all...] |
| H A D | cvmx-pescx-defs.h | 31 #define CVMX_PESCX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000018ull) + ((block_id) & 1) * 0x8000000ull)
32 #define CVMX_PESCX_BIST_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000418ull) + ((block_id) & 1) * 0x8000000ull)
33 #define CVMX_PESCX_CFG_RD(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000030ull) + ((block_id) & 1) * 0x8000000ull)
34 #define CVMX_PESCX_CFG_WR(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000028ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_PESCX_CPL_LUT_VALID(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000098ull) + ((block_id)
[all...] |
| H A D | cvmx-srxx-defs.h | 31 #define CVMX_SRXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000200ull) + ((block_id) & 1) * 0x8000000ull)
32 #define CVMX_SRXX_IGN_RX_FULL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000218ull) + ((block_id) & 1) * 0x8000000ull)
33 #define CVMX_SRXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000000ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8)
34 #define CVMX_SRXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000208ull) + ((block_id) & 1) * 0x8000000ull)
35 #define CVMX_SRXX_SW_TICK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000220ull) + ((block_id)
[all...] |
| H A D | cvmx-l2c-defs.h | 36 #define CVMX_L2C_ERR_TDTX(block_id) \
37 (CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x40000ull)
38 #define CVMX_L2C_ERR_TTGX(block_id) \
39 (CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x40000ull)
54 #define CVMX_L2C_TADX_PFCX(offset, block_id) \
56 ((block_id) & 7) * 0x8000ull) * 8)
57 #define CVMX_L2C_TADX_PFC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00400ull) + \
58 ((block_id) & 3) * 0x40000ull)
59 #define CVMX_L2C_TADX_PFC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00408ull) + \
60 ((block_id)
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/mscc/ |
| H A D | ocelot_flower.c | 149 int block_id; in ocelot_find_vcap_filter_that_points_at() local
151 block_id = ocelot_chain_to_block(chain, true); in ocelot_find_vcap_filter_that_points_at()
152 if (block_id < 0) in ocelot_find_vcap_filter_that_points_at()
155 if (block_id == VCAP_IS2) { in ocelot_find_vcap_filter_that_points_at()
250 filter->block_id = ocelot_chain_to_block(chain, ingress); in ocelot_flower_parse_action()
251 if (filter->block_id < 0) { in ocelot_flower_parse_action()
255 if (filter->block_id == VCAP_IS1 || filter->block_id == VCAP_IS2) in ocelot_flower_parse_action()
257 if (filter->block_id == VCAP_IS2) in ocelot_flower_parse_action()
266 if (filter->block_id ! in ocelot_flower_parse_action()
874 int block_id, ret; ocelot_cls_flower_replace() local
942 int block_id; ocelot_cls_flower_destroy() local
980 int block_id, ret; ocelot_cls_flower_stats() local
[all...] |