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/kernel/linux/linux-5.10/arch/xtensa/variants/csp/include/variant/
H A Dtie-asm.h62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
81 rur.THREADPTR \at1 // threadptr option
82 s32i \at1, \ptr, .Lxchal_ofs_+0
91 rsr.ACCLO \at1 // MAC16 option
92 s32i \at1, \ptr, .Lxchal_ofs_+0
93 rsr.ACCHI \at1 // MAC16 option
94 s32i \at1, \ptr, .Lxchal_ofs_+4
103 rsr.BR \at1 // boolean option
104 s32i \at1, \pt
147 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
157 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
169 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
[all...]
/kernel/linux/linux-6.6/arch/xtensa/variants/csp/include/variant/
H A Dtie-asm.h62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
81 rur.THREADPTR \at1 // threadptr option
82 s32i \at1, \ptr, .Lxchal_ofs_+0
91 rsr.ACCLO \at1 // MAC16 option
92 s32i \at1, \ptr, .Lxchal_ofs_+0
93 rsr.ACCHI \at1 // MAC16 option
94 s32i \at1, \ptr, .Lxchal_ofs_+4
103 rsr.BR \at1 // boolean option
104 s32i \at1, \pt
147 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
157 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
169 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
[all...]
/kernel/linux/linux-5.10/arch/xtensa/variants/de212/include/variant/
H A Dtie-asm.h62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
81 rsr.ACCLO \at1 // MAC16 option
82 s32i \at1, \ptr, .Lxchal_ofs_+0
83 rsr.ACCHI \at1 // MAC16 option
84 s32i \at1, \ptr, .Lxchal_ofs_+4
93 rsr.SCOMPARE1 \at1 // conditional store option
94 s32i \at1, \ptr, .Lxchal_ofs_+0
95 rsr.M0 \at1 // MAC16 option
96 s32i \at1, \pt
135 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
147 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
[all...]
/kernel/linux/linux-6.6/arch/xtensa/variants/de212/include/variant/
H A Dtie-asm.h62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
81 rsr.ACCLO \at1 // MAC16 option
82 s32i \at1, \ptr, .Lxchal_ofs_+0
83 rsr.ACCHI \at1 // MAC16 option
84 s32i \at1, \ptr, .Lxchal_ofs_+4
93 rsr.SCOMPARE1 \at1 // conditional store option
94 s32i \at1, \ptr, .Lxchal_ofs_+0
95 rsr.M0 \at1 // MAC16 option
96 s32i \at1, \pt
135 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
147 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
[all...]
/kernel/linux/linux-5.10/arch/xtensa/variants/dc233c/include/variant/
H A Dtie-asm.h63 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
77 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 rur.THREADPTR \at1 // threadptr option
83 s32i \at1, \ptr, .Lxchal_ofs_+0
92 rsr \at1, ACCLO // MAC16 option variable
93 s32i \at1, \ptr, .Lxchal_ofs_+0 variable
94 rsr \at1, ACCHI // MAC16 option
95 s32i \at1, \ptr, .Lxchal_ofs_+4 variable
104 rsr \at1, M0 // MAC16 option variable
105 s32i \at1, \pt variable
107 s32i \\at1, \\ptr, .Lxchal_ofs_+4 global() variable
109 s32i \\at1, \\ptr, .Lxchal_ofs_+8 global() variable
111 s32i \\at1, \\ptr, .Lxchal_ofs_+12 global() variable
113 s32i \\at1, \\ptr, .Lxchal_ofs_+16 global() variable
146 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
156 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
158 l32i \\at1, \\ptr, .Lxchal_ofs_+4 global() variable
168 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
170 l32i \\at1, \\ptr, .Lxchal_ofs_+4 global() variable
172 l32i \\at1, \\ptr, .Lxchal_ofs_+8 global() variable
174 l32i \\at1, \\ptr, .Lxchal_ofs_+12 global() variable
176 l32i \\at1, \\ptr, .Lxchal_ofs_+16 global() variable
[all...]
/kernel/linux/linux-6.6/arch/xtensa/variants/dc233c/include/variant/
H A Dtie-asm.h63 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
77 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 rur.THREADPTR \at1 // threadptr option
83 s32i \at1, \ptr, .Lxchal_ofs_+0
92 rsr \at1, ACCLO // MAC16 option variable
93 s32i \at1, \ptr, .Lxchal_ofs_+0 variable
94 rsr \at1, ACCHI // MAC16 option
95 s32i \at1, \ptr, .Lxchal_ofs_+4 variable
104 rsr \at1, M0 // MAC16 option variable
105 s32i \at1, \pt variable
107 s32i \\at1, \\ptr, .Lxchal_ofs_+4 global() variable
109 s32i \\at1, \\ptr, .Lxchal_ofs_+8 global() variable
111 s32i \\at1, \\ptr, .Lxchal_ofs_+12 global() variable
113 s32i \\at1, \\ptr, .Lxchal_ofs_+16 global() variable
146 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
156 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
158 l32i \\at1, \\ptr, .Lxchal_ofs_+4 global() variable
168 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
170 l32i \\at1, \\ptr, .Lxchal_ofs_+4 global() variable
172 l32i \\at1, \\ptr, .Lxchal_ofs_+8 global() variable
174 l32i \\at1, \\ptr, .Lxchal_ofs_+12 global() variable
176 l32i \\at1, \\ptr, .Lxchal_ofs_+16 global() variable
[all...]
/kernel/linux/linux-5.10/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dtie-asm.h63 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
77 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 rur.THREADPTR \at1 // threadptr option
83 s32i \at1, \ptr, .Lxchal_ofs_+0
92 rsr.ACCLO \at1 // MAC16 option
93 s32i \at1, \ptr, .Lxchal_ofs_+0
94 rsr.ACCHI \at1 // MAC16 option
95 s32i \at1, \ptr, .Lxchal_ofs_+4
104 rsr.M0 \at1 // MAC16 option
105 s32i \at1, \pt
148 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
158 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
170 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
267 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
[all...]
/kernel/linux/linux-5.10/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dtie-asm.h62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
81 rur.THREADPTR \at1 // threadptr option
82 s32i \at1, \ptr, .Lxchal_ofs_+0
91 rsr.ACCLO \at1 // MAC16 option
92 s32i \at1, \ptr, .Lxchal_ofs_+0
93 rsr.ACCHI \at1 // MAC16 option
94 s32i \at1, \ptr, .Lxchal_ofs_+4
103 rsr.BR \at1 // boolean option
104 s32i \at1, \pt
147 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
157 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
169 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
254 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
[all...]
/kernel/linux/linux-6.6/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dtie-asm.h63 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
77 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 rur.THREADPTR \at1 // threadptr option
83 s32i \at1, \ptr, .Lxchal_ofs_+0
92 rsr.ACCLO \at1 // MAC16 option
93 s32i \at1, \ptr, .Lxchal_ofs_+0
94 rsr.ACCHI \at1 // MAC16 option
95 s32i \at1, \ptr, .Lxchal_ofs_+4
104 rsr.M0 \at1 // MAC16 option
105 s32i \at1, \pt
148 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
158 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
170 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
267 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
[all...]
/kernel/linux/linux-6.6/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dtie-asm.h62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
81 rur.THREADPTR \at1 // threadptr option
82 s32i \at1, \ptr, .Lxchal_ofs_+0
91 rsr.ACCLO \at1 // MAC16 option
92 s32i \at1, \ptr, .Lxchal_ofs_+0
93 rsr.ACCHI \at1 // MAC16 option
94 s32i \at1, \ptr, .Lxchal_ofs_+4
103 rsr.BR \at1 // boolean option
104 s32i \at1, \pt
147 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
157 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
169 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
254 l32i \\at1, \\ptr, .Lxchal_ofs_+0 global() variable
[all...]
/kernel/linux/linux-5.10/arch/xtensa/variants/dc232b/include/variant/
H A Dtie-asm.h35 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
41 rsr \at1, ACCLO // MAC16 accumulator variable
43 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
49 rsr \at1, M0 // MAC16 registers variable
51 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
53 rsr \at1, M2
55 s32i \at1, \ptr, .Lxchal_ofs_ + 8 variable
61 rsr \at1, SCOMPARE1 // conditional store option variable
62 s32i \at1, \pt variable
67 rur \\at1, THREADPTR // threadptr option global() variable
68 s32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
82 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
90 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
94 l32i \\at1, \\ptr, .Lxchal_ofs_ + 8 global() variable
102 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
108 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
[all...]
/kernel/linux/linux-6.6/arch/xtensa/variants/dc232b/include/variant/
H A Dtie-asm.h35 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
41 rsr \at1, ACCLO // MAC16 accumulator variable
43 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
49 rsr \at1, M0 // MAC16 registers variable
51 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
53 rsr \at1, M2
55 s32i \at1, \ptr, .Lxchal_ofs_ + 8 variable
61 rsr \at1, SCOMPARE1 // conditional store option variable
62 s32i \at1, \pt variable
67 rur \\at1, THREADPTR // threadptr option global() variable
68 s32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
82 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
90 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
94 l32i \\at1, \\ptr, .Lxchal_ofs_ + 8 global() variable
102 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
108 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
[all...]
/kernel/linux/linux-5.10/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dtie-asm.h34 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
36 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
40 rsr \at1, BR // boolean option variable
41 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
46 rsr \at1, SCOMPARE1 // conditional store option variable
47 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
52 rur \at1, THREADPTR // threadptr option variable
53 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
61 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
63 .macro xchal_ncp_load ptr at1 at
67 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
73 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
79 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
102 s32i \\at1, \\ptr, 0 global() variable
104 s32i \\at1, \\ptr, 4 global() variable
106 s32i \\at1, \\ptr, 8 global() variable
108 s32i \\at1, \\ptr, 12 global() variable
137 l32i \\at1, \\ptr, 0 global() variable
139 l32i \\at1, \\ptr, 4 global() variable
141 l32i \\at1, \\ptr, 8 global() variable
143 l32i \\at1, \\ptr, 12 global() variable
[all...]
/kernel/linux/linux-6.6/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dtie-asm.h34 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
36 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
40 rsr \at1, BR // boolean option variable
41 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
46 rsr \at1, SCOMPARE1 // conditional store option variable
47 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
52 rur \at1, THREADPTR // threadptr option variable
53 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
61 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
63 .macro xchal_ncp_load ptr at1 at
67 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
73 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
79 l32i \\at1, \\ptr, .Lxchal_ofs_ + 0 global() variable
102 s32i \\at1, \\ptr, 0 global() variable
104 s32i \\at1, \\ptr, 4 global() variable
106 s32i \\at1, \\ptr, 8 global() variable
108 s32i \\at1, \\ptr, 12 global() variable
137 l32i \\at1, \\ptr, 0 global() variable
139 l32i \\at1, \\ptr, 4 global() variable
141 l32i \\at1, \\ptr, 8 global() variable
143 l32i \\at1, \\ptr, 12 global() variable
[all...]
/kernel/linux/linux-5.10/arch/xtensa/variants/fsf/include/variant/
H A Dtie-asm.h35 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
41 rur \at1, THREADPTR // threadptr option variable
42 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
50 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
52 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
56 l32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
57 wur \at1, THREADPTR // threadptr option
/kernel/linux/linux-6.6/arch/xtensa/variants/fsf/include/variant/
H A Dtie-asm.h35 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
41 rur \at1, THREADPTR // threadptr option variable
42 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
50 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
52 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
56 l32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
57 wur \at1, THREADPTR // threadptr option
/kernel/linux/linux-5.10/arch/xtensa/include/asm/
H A Dcoprocessor.h36 .macro save_xtregs_opt ptr clb at1 at2 at3 at4 offset
39 xchal_ncp_store \clb \at1 \at2 \at3 \at4 select=_SELECT
43 .macro load_xtregs_opt ptr clb at1 at2 at3 at4 offset
46 xchal_ncp_load \clb \at1 \at2 \at3 \at4 select=_SELECT
55 .macro save_xtregs_user ptr clb at1 at2 at3 at4 offset
58 xchal_ncp_store \clb \at1 \at2 \at3 \at4 select=_SELECT
62 .macro load_xtregs_user ptr clb at1 at2 at3 at4 offset
65 xchal_ncp_load \clb \at1 \at2 \at3 \at4 select=_SELECT
/kernel/linux/linux-6.6/arch/xtensa/include/asm/
H A Dcoprocessor.h36 .macro save_xtregs_opt ptr clb at1 at2 at3 at4 offset
39 xchal_ncp_store \clb \at1 \at2 \at3 \at4 select=_SELECT
43 .macro load_xtregs_opt ptr clb at1 at2 at3 at4 offset
46 xchal_ncp_load \clb \at1 \at2 \at3 \at4 select=_SELECT
55 .macro save_xtregs_user ptr clb at1 at2 at3 at4 offset
58 xchal_ncp_store \clb \at1 \at2 \at3 \at4 select=_SELECT
62 .macro load_xtregs_user ptr clb at1 at2 at3 at4 offset
65 xchal_ncp_load \clb \at1 \at2 \at3 \at4 select=_SELECT
/kernel/linux/linux-5.10/drivers/pinctrl/tegra/
H A Dpinctrl-tegra124.c2001 DRV_PINGROUP(at1, 0x870, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, Y),
H A Dpinctrl-tegra20.c2175 DRV_PG(at1, 0x870),
H A Dpinctrl-tegra114.c1794 DRV_PINGROUP(at1, 0x870, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, Y),
H A Dpinctrl-tegra30.c2426 DRV_PINGROUP(at1, 0x870, 2, 3, 4, 14, 5, 19, 5, 24, 2, 28, 2),
/kernel/linux/linux-6.6/drivers/pinctrl/tegra/
H A Dpinctrl-tegra114.c1791 DRV_PINGROUP(at1, 0x870, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, Y),
H A Dpinctrl-tegra124.c1998 DRV_PINGROUP(at1, 0x870, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, Y),
H A Dpinctrl-tegra20.c2172 DRV_PG(at1, 0x870),

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