Searched refs:alt_parent (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| H A D | clk-cpu.h | 34 * @alt_parent: alternate parent clock to use when switching the speed
49 const struct clk_hw *alt_parent; member
67 const struct clk_hw *parent, const struct clk_hw *alt_parent,
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| H A D | clk-cpu.c | 153 unsigned long alt_prate = clk_hw_get_rate(cpuclk->alt_parent); in exynos_cpuclk_pre_rate_change()
281 unsigned long alt_prate = clk_hw_get_rate(cpuclk->alt_parent); in exynos5433_cpuclk_pre_rate_change()
405 const struct clk_hw *parent, const struct clk_hw *alt_parent, in exynos_register_cpu_clock()
414 if (IS_ERR(parent) || IS_ERR(alt_parent)) { in exynos_register_cpu_clock()
431 cpuclk->alt_parent = alt_parent; in exynos_register_cpu_clock()
403 exynos_register_cpu_clock(struct samsung_clk_provider *ctx, unsigned int lookup_id, const char *name, const struct clk_hw *parent, const struct clk_hw *alt_parent, unsigned long offset, const struct exynos_cpuclk_cfg_data *cfg, unsigned long num_cfgs, unsigned long flags) exynos_register_cpu_clock() argument
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| H A D | clk-cpu.c | 42 * @alt_parent: alternate parent clock to use when switching the speed
58 struct clk *alt_parent; member
136 alt_prate = clk_get_rate(cpuclk->alt_parent); in rockchip_cpuclk_pre_rate_change()
285 cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]); in rockchip_clk_register_cpuclk()
286 if (!cpuclk->alt_parent) { in rockchip_clk_register_cpuclk()
293 ret = clk_prepare_enable(cpuclk->alt_parent); in rockchip_clk_register_cpuclk()
341 clk_disable_unprepare(cpuclk->alt_parent); in rockchip_clk_register_cpuclk()
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| /kernel/linux/linux-6.6/drivers/clk/rockchip/ |
| H A D | clk-cpu.c | 42 * @alt_parent: alternate parent clock to use when switching the speed
54 struct clk *alt_parent; member
169 alt_prate = clk_get_rate(cpuclk->alt_parent); in rockchip_cpuclk_pre_rate_change()
339 cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]); in rockchip_clk_register_cpuclk()
340 if (!cpuclk->alt_parent) { in rockchip_clk_register_cpuclk()
347 ret = clk_prepare_enable(cpuclk->alt_parent); in rockchip_clk_register_cpuclk()
395 clk_disable_unprepare(cpuclk->alt_parent); in rockchip_clk_register_cpuclk()
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| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| H A D | clk-cpu.c | 153 unsigned long alt_prate = clk_hw_get_rate(cpuclk->alt_parent); in exynos_cpuclk_pre_rate_change()
281 unsigned long alt_prate = clk_hw_get_rate(cpuclk->alt_parent); in exynos5433_cpuclk_pre_rate_change()
405 const struct clk_hw *parent, const struct clk_hw *alt_parent, in exynos_register_cpu_clock()
414 if (IS_ERR(parent) || IS_ERR(alt_parent)) { in exynos_register_cpu_clock()
431 cpuclk->alt_parent = alt_parent; in exynos_register_cpu_clock()
403 exynos_register_cpu_clock(struct samsung_clk_provider *ctx, unsigned int lookup_id, const char *name, const struct clk_hw *parent, const struct clk_hw *alt_parent, unsigned long offset, const struct exynos_cpuclk_cfg_data *cfg, unsigned long num_cfgs, unsigned long flags) exynos_register_cpu_clock() argument
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| H A D | clk-cpu.h | 34 * @alt_parent: alternate parent clock to use when switching the speed
49 const struct clk_hw *alt_parent; member
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