__offset_PIPE (reference) in projects: kernel - OpenGrok search results

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Searched refs:__offset_PIPE (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/
H A D	mdp5.xml.h	535 static inline uint32_t __offset_PIPE(enum mdp5_pipe idx) in __offset_PIPE() function 554 static inline uint32_t REG_MDP5_PIPE(enum mdp5_pipe i0) { return 0x00000000 + __offset_PIPE(i0); } in REG_MDP5_PIPE() 556 static inline uint32_t REG_MDP5_PIPE_OP_MODE(enum mdp5_pipe i0) { return 0x00000200 + __offset_PIPE(i0); } in REG_MDP5_PIPE_OP_MODE() 571 static inline uint32_t REG_MDP5_PIPE_HIST_CTL_BASE(enum mdp5_pipe i0) { return 0x000002c4 + __offset_PIPE(i0); } in REG_MDP5_PIPE_HIST_CTL_BASE() 573 static inline uint32_t REG_MDP5_PIPE_HIST_LUT_BASE(enum mdp5_pipe i0) { return 0x000002f0 + __offset_PIPE(i0); } in REG_MDP5_PIPE_HIST_LUT_BASE() 575 static inline uint32_t REG_MDP5_PIPE_HIST_LUT_SWAP(enum mdp5_pipe i0) { return 0x00000300 + __offset_PIPE(i0); } in REG_MDP5_PIPE_HIST_LUT_SWAP() 577 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0(enum mdp5_pipe i0) { return 0x00000320 + __offset_PIPE(i0); } in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0() 591 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1(enum mdp5_pipe i0) { return 0x00000324 + __offset_PIPE(i0); } in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1() 605 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2(enum mdp5_pipe i0) { return 0x00000328 + __offset_PIPE(i0); } in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2() 619 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_3(enum mdp5_pipe i0) { return 0x0000032c + __offset_PIPE(i [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/mdp5/
H A D	mdp5.xml.h	546 static inline uint32_t __offset_PIPE(enum mdp5_pipe idx) in __offset_PIPE() function 565 static inline uint32_t REG_MDP5_PIPE(enum mdp5_pipe i0) { return 0x00000000 + __offset_PIPE(i0); } in REG_MDP5_PIPE() 567 static inline uint32_t REG_MDP5_PIPE_OP_MODE(enum mdp5_pipe i0) { return 0x00000200 + __offset_PIPE(i0); } in REG_MDP5_PIPE_OP_MODE() 582 static inline uint32_t REG_MDP5_PIPE_HIST_CTL_BASE(enum mdp5_pipe i0) { return 0x000002c4 + __offset_PIPE(i0); } in REG_MDP5_PIPE_HIST_CTL_BASE() 584 static inline uint32_t REG_MDP5_PIPE_HIST_LUT_BASE(enum mdp5_pipe i0) { return 0x000002f0 + __offset_PIPE(i0); } in REG_MDP5_PIPE_HIST_LUT_BASE() 586 static inline uint32_t REG_MDP5_PIPE_HIST_LUT_SWAP(enum mdp5_pipe i0) { return 0x00000300 + __offset_PIPE(i0); } in REG_MDP5_PIPE_HIST_LUT_SWAP() 588 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0(enum mdp5_pipe i0) { return 0x00000320 + __offset_PIPE(i0); } in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0() 602 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1(enum mdp5_pipe i0) { return 0x00000324 + __offset_PIPE(i0); } in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1() 616 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2(enum mdp5_pipe i0) { return 0x00000328 + __offset_PIPE(i0); } in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2() 630 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_3(enum mdp5_pipe i0) { return 0x0000032c + __offset_PIPE(i [all...]

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