XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL (reference) in projects: kernel

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/kernel/linux/linux-5.10/drivers/phy/tegra/
H A D	xusb-tegra210.c	`153 #define XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL 0x19 macro 321 value \|= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL << in tegra210_pex_uphy_enable() 559 value \|= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL << in tegra210_sata_uphy_enable()`
/kernel/linux/linux-6.6/drivers/phy/tegra/
H A D	xusb-tegra210.c	`173 #define XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL 0x19 macro 527 value \|= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL << in tegra210_pex_uphy_enable() 782 value \|= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL << in tegra210_sata_uphy_enable()`