XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK (reference) in projects: kernel

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/kernel/linux/linux-5.10/drivers/phy/tegra/
H A D	xusb-tegra210.c	`156 #define XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK 0x3 macro 317 value &= ~((XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK << in tegra210_pex_uphy_enable() 553 value &= ~((XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK << in tegra210_sata_uphy_enable()`
/kernel/linux/linux-6.6/drivers/phy/tegra/
H A D	xusb-tegra210.c	`176 #define XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK 0x3 macro 523 value &= ~((XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK << in tegra210_pex_uphy_enable() 776 value &= ~((XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK << in tegra210_sata_uphy_enable()`