XSP_USBPHYACR5 (reference) in projects: kernel - OpenGrok search results

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Searched refs:XSP_USBPHYACR5 (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/phy/mediatek/
H A D	phy-mtk-xsphy.c	58 #define XSP_USBPHYACR5 ((SSUSB_SIFSLV_U2PHY_COM) + 0x014) macro 129 tmp = readl(pbase + XSP_USBPHYACR5); in u2_phy_slew_rate_calibrate() 131 writel(tmp, pbase + XSP_USBPHYACR5); in u2_phy_slew_rate_calibrate() 180 tmp = readl(pbase + XSP_USBPHYACR5); in u2_phy_slew_rate_calibrate() 183 writel(tmp, pbase + XSP_USBPHYACR5); in u2_phy_slew_rate_calibrate() 186 tmp = readl(pbase + XSP_USBPHYACR5); in u2_phy_slew_rate_calibrate() 188 writel(tmp, pbase + XSP_USBPHYACR5); in u2_phy_slew_rate_calibrate() 319 tmp = readl(pbase + XSP_USBPHYACR5); in u2_phy_props_set() 322 writel(tmp, pbase + XSP_USBPHYACR5); in u2_phy_props_set()
/kernel/linux/linux-6.6/drivers/phy/mediatek/
H A D	phy-mtk-xsphy.c	`55 #define XSP_USBPHYACR5 ((SSUSB_SIFSLV_U2PHY_COM) + 0x014) macro 122 mtk_phy_set_bits(pbase + XSP_USBPHYACR5, P2A5_RG_HSTX_SRCAL_EN); in u2_phy_slew_rate_calibrate() 161 mtk_phy_update_field(pbase + XSP_USBPHYACR5, P2A5_RG_HSTX_SRCTRL, calib_val); in u2_phy_slew_rate_calibrate() 164 mtk_phy_clear_bits(pbase + XSP_USBPHYACR5, P2A5_RG_HSTX_SRCAL_EN); in u2_phy_slew_rate_calibrate() 278 mtk_phy_update_field(pbase + XSP_USBPHYACR5, P2A5_RG_HSTX_SRCTRL, in u2_phy_props_set()`

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