Searched refs:XHI_CR_OFFSET (Results 1 - 2 of 2) sorted by relevance
/kernel/linux/linux-5.10/drivers/char/xilinx_hwicap/ |
H A D | fifo_icap.c | 42 #define XHI_CR_OFFSET 0x10C /* Control Register */ macro 130 out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_WRITE_MASK); in fifo_icap_start_config() 140 out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_READ_MASK); in fifo_icap_start_readback() 364 reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); in fifo_icap_reset() 366 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_reset() 369 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_reset() 385 reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); in fifo_icap_flush_fifo() 387 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_flush_fifo() 390 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_flush_fifo()
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/kernel/linux/linux-6.6/drivers/char/xilinx_hwicap/ |
H A D | fifo_icap.c | 42 #define XHI_CR_OFFSET 0x10C /* Control Register */ macro 130 out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_WRITE_MASK); in fifo_icap_start_config() 140 out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_READ_MASK); in fifo_icap_start_readback() 364 reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); in fifo_icap_reset() 366 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_reset() 369 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_reset() 385 reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET); in fifo_icap_flush_fifo() 387 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_flush_fifo() 390 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_flush_fifo()
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