Searched refs:X1CLK (Results 1 - 19 of 19) sorted by relevance
| /kernel/linux/linux-5.10/drivers/net/hamradio/ |
| H A D | z8530.h | 82 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | dmascc.c | 751 write_scc(priv, R4, SDLC | X1CLK); in scc_open()
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| H A D | scc.c | 800 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ in init_channel()
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| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| H A D | zs.h | 135 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | ip22zilog.h | 116 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | sunzilog.h | 108 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | pmac_zilog.h | 206 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | pmac_zilog.c | 793 write_zsreg(uap, 4, X1CLK | MONSYNC); in pmz_fix_zero_bug_scc()
1007 uap->curregs[R4] = X1CLK; in pmz_convert_to_zs()
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| H A D | zs.c | 905 zport->regs[4] |= X1CLK; in zs_set_termios()
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| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| H A D | zs.h | 135 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | ip22zilog.h | 116 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | sunzilog.h | 108 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | pmac_zilog.h | 196 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | pmac_zilog.c | 773 write_zsreg(uap, 4, X1CLK | MONSYNC); in pmz_fix_zero_bug_scc()
979 uap->curregs[R4] = X1CLK; in pmz_convert_to_zs()
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| H A D | zs.c | 905 zport->regs[4] |= X1CLK; in zs_set_termios()
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| /kernel/linux/linux-6.6/drivers/net/hamradio/ |
| H A D | z8530.h | 82 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | scc.c | 802 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ in init_channel()
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| /kernel/linux/linux-5.10/drivers/net/wan/ |
| H A D | z85230.h | 103 #define X1CLK 0x0 /* x1 clock mode */ macro
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| H A D | z85230.c | 215 4, SYNC_ENAB|SDLC|X1CLK,
240 4, SYNC_ENAB|SDLC|X1CLK,
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