/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
H A D | nbio_v4_3.c | 34 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL, in nbio_v4_3_remap_hdp_registers() 36 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL, in nbio_v4_3_remap_hdp_registers() 53 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, in nbio_v4_3_mc_access_enable() 57 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, 0); in nbio_v4_3_mc_access_enable() 99 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_2_CTRL, doorbell_range); in nbio_v4_3_sdma_doorbell_range() 141 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_5_CTRL, doorbell_range); in nbio_v4_3_vcn_doorbell_range() 143 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_4_CTRL, doorbell_range); in nbio_v4_3_vcn_doorbell_range() 148 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_0_CTRL, 0x30000007); in nbio_v4_3_gc_doorbell_init() 149 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_3_CTRL, 0x3000000d); in nbio_v4_3_gc_doorbell_init() 172 WREG32_SOC15(NBI in nbio_v4_3_enable_doorbell_selfring_aperture() [all...] |
H A D | vcn_v1_0.c | 312 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 314 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 316 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v1_0_mc_resume_spg_mode() 319 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 321 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 324 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v1_0_mc_resume_spg_mode() 328 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v1_0_mc_resume_spg_mode() 331 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 333 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 335 WREG32_SOC15(UV in vcn_v1_0_mc_resume_spg_mode() [all...] |
H A D | mmhub_v3_0_1.c | 158 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_1_init_gart_aperture_regs() 160 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_1_init_gart_aperture_regs() 163 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_1_init_gart_aperture_regs() 165 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_1_init_gart_aperture_regs() 175 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0); in mmhub_v3_0_1_init_system_aperture_regs() 176 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v3_0_1_init_system_aperture_regs() 177 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v3_0_1_init_system_aperture_regs() 185 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v3_0_1_init_system_aperture_regs() 187 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v3_0_1_init_system_aperture_regs() 193 WREG32_SOC15(MMHU in mmhub_v3_0_1_init_system_aperture_regs() [all...] |
H A D | lsdma_v6_0.c | 47 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_LO, lower_32_bits(src_addr)); in lsdma_v6_0_copy_mem() 48 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_HI, upper_32_bits(src_addr)); in lsdma_v6_0_copy_mem() 50 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr)); in lsdma_v6_0_copy_mem() 51 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr)); in lsdma_v6_0_copy_mem() 53 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONTROL, 0x0); in lsdma_v6_0_copy_mem() 63 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_COMMAND, tmp); in lsdma_v6_0_copy_mem() 80 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONSTFILL_DATA, data); in lsdma_v6_0_fill_mem() 82 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr)); in lsdma_v6_0_fill_mem() 83 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr)); in lsdma_v6_0_fill_mem() 85 WREG32_SOC15(LSDM in lsdma_v6_0_fill_mem() [all...] |
H A D | gfxhub_v2_1.c | 143 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs() 145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs() 148 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs() 150 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs() 159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_1_init_system_aperture_regs() 160 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_1_init_system_aperture_regs() 161 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_1_init_system_aperture_regs() 164 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_1_init_system_aperture_regs() 166 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_1_init_system_aperture_regs() 171 WREG32_SOC15(G in gfxhub_v2_1_init_system_aperture_regs() [all...] |
H A D | gfxhub_v3_0.c | 139 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v3_0_init_gart_aperture_regs() 141 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v3_0_init_gart_aperture_regs() 144 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v3_0_init_gart_aperture_regs() 146 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v3_0_init_gart_aperture_regs() 155 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0); in gfxhub_v3_0_init_system_aperture_regs() 156 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v3_0_init_system_aperture_regs() 157 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v3_0_init_system_aperture_regs() 161 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v3_0_init_system_aperture_regs() 163 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v3_0_init_system_aperture_regs() 169 WREG32_SOC15(G in gfxhub_v3_0_init_system_aperture_regs() [all...] |
H A D | mmhub_v3_0_2.c | 149 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_2_init_gart_aperture_regs() 151 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_2_init_gart_aperture_regs() 154 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_2_init_gart_aperture_regs() 156 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_2_init_gart_aperture_regs() 166 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0); in mmhub_v3_0_2_init_system_aperture_regs() 167 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v3_0_2_init_system_aperture_regs() 168 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v3_0_2_init_system_aperture_regs() 177 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v3_0_2_init_system_aperture_regs() 179 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v3_0_2_init_system_aperture_regs() 186 WREG32_SOC15(MMHU in mmhub_v3_0_2_init_system_aperture_regs() [all...] |
H A D | psp_v3_1.c | 102 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v3_1_bootloader_load_sysdrv() 105 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v3_1_bootloader_load_sysdrv() 141 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v3_1_bootloader_load_sos() 144 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v3_1_bootloader_load_sos() 165 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v3_1_reroute_ih() 166 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v3_1_reroute_ih() 167 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih() 177 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v3_1_reroute_ih() 178 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v3_1_reroute_ih() 179 WREG32_SOC15(MP in psp_v3_1_reroute_ih() [all...] |
H A D | psp_v12_0.c | 96 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sysdrv() 99 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sysdrv() 135 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sos() 138 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sos() 160 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v12_0_reroute_ih() 161 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih() 162 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih() 172 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v12_0_reroute_ih() 173 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih() 174 WREG32_SOC15(MP in psp_v12_0_reroute_ih() [all...] |
H A D | mmhub_v2_3.c | 139 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v2_3_init_gart_aperture_regs() 141 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v2_3_init_gart_aperture_regs() 144 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v2_3_init_gart_aperture_regs() 146 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v2_3_init_gart_aperture_regs() 156 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BASE, 0); in mmhub_v2_3_init_system_aperture_regs() 157 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v2_3_init_system_aperture_regs() 158 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v2_3_init_system_aperture_regs() 161 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v2_3_init_system_aperture_regs() 163 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v2_3_init_system_aperture_regs() 168 WREG32_SOC15(MMHU in mmhub_v2_3_init_system_aperture_regs() [all...] |
H A D | psp_v11_0_8.c | 39 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_8_ring_stop() 48 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v11_0_8_ring_stop() 77 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v11_0_8_ring_create() 80 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg); in psp_v11_0_8_ring_create() 83 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_8_ring_create() 104 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg); in psp_v11_0_8_ring_create() 107 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg); in psp_v11_0_8_ring_create() 110 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg); in psp_v11_0_8_ring_create() 114 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v11_0_8_ring_create() 163 WREG32_SOC15(MP in psp_v11_0_8_ring_set_wptr() [all...] |
H A D | gfxhub_v3_0_3.c | 142 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v3_0_3_init_gart_aperture_regs() 144 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v3_0_3_init_gart_aperture_regs() 147 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v3_0_3_init_gart_aperture_regs() 149 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v3_0_3_init_gart_aperture_regs() 161 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0); in gfxhub_v3_0_3_init_system_aperture_regs() 162 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v3_0_3_init_system_aperture_regs() 163 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v3_0_3_init_system_aperture_regs() 166 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v3_0_3_init_system_aperture_regs() 168 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v3_0_3_init_system_aperture_regs() 174 WREG32_SOC15(G in gfxhub_v3_0_3_init_system_aperture_regs() [all...] |
H A D | gfxhub_v2_0.c | 140 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs() 142 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs() 145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs() 147 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs() 157 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_0_init_system_aperture_regs() 158 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_0_init_system_aperture_regs() 159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_0_init_system_aperture_regs() 162 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_0_init_system_aperture_regs() 164 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_0_init_system_aperture_regs() 169 WREG32_SOC15(G in gfxhub_v2_0_init_system_aperture_regs() [all...] |
H A D | mmhub_v3_0.c | 156 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_init_gart_aperture_regs() 158 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_init_gart_aperture_regs() 161 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_init_gart_aperture_regs() 163 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_init_gart_aperture_regs() 181 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0); in mmhub_v3_0_init_system_aperture_regs() 182 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v3_0_init_system_aperture_regs() 183 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v3_0_init_system_aperture_regs() 186 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v3_0_init_system_aperture_regs() 188 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v3_0_init_system_aperture_regs() 194 WREG32_SOC15(MMHU in mmhub_v3_0_init_system_aperture_regs() [all...] |
H A D | gfxhub_v1_0.c | 69 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs() 71 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs() 74 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs() 76 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs() 79 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs() 81 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs() 84 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs() 86 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs() 126 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v1_0_init_system_aperture_regs() 128 WREG32_SOC15(G in gfxhub_v1_0_init_system_aperture_regs() [all...] |
H A D | vcn_v2_0.c | 341 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 343 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 345 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v2_0_mc_resume() 348 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 350 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 353 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v2_0_mc_resume() 357 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v2_0_mc_resume() 360 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 362 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 364 WREG32_SOC15(UV in vcn_v2_0_mc_resume() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
H A D | vcn_v1_0.c | 309 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 311 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 313 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v1_0_mc_resume_spg_mode() 316 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 318 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 321 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v1_0_mc_resume_spg_mode() 325 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v1_0_mc_resume_spg_mode() 328 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 330 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 332 WREG32_SOC15(UV in vcn_v1_0_mc_resume_spg_mode() [all...] |
H A D | vega10_ih.c | 59 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in vega10_ih_enable_interrupts() 74 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); in vega10_ih_enable_interrupts() 90 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl); in vega10_ih_enable_interrupts() 115 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in vega10_ih_disable_interrupts() 119 WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0); in vega10_ih_disable_interrupts() 120 WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR, 0); in vega10_ih_disable_interrupts() 135 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); in vega10_ih_disable_interrupts() 138 WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING1, 0); in vega10_ih_disable_interrupts() 139 WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_RING1, 0); in vega10_ih_disable_interrupts() 155 WREG32_SOC15(OSSSY in vega10_ih_disable_interrupts() [all...] |
H A D | gfxhub_v2_1.c | 140 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs() 142 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs() 145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs() 147 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs() 156 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_1_init_system_aperture_regs() 157 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, 0); in gfxhub_v2_1_init_system_aperture_regs() 158 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, 0x00FFFFFF); in gfxhub_v2_1_init_system_aperture_regs() 161 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_1_init_system_aperture_regs() 163 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_1_init_system_aperture_regs() 169 WREG32_SOC15(G in gfxhub_v2_1_init_system_aperture_regs() [all...] |
H A D | psp_v12_0.c | 146 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sysdrv() 149 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sysdrv() 187 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sos() 190 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sos() 212 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v12_0_reroute_ih() 213 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih() 214 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih() 224 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v12_0_reroute_ih() 225 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih() 226 WREG32_SOC15(MP in psp_v12_0_reroute_ih() [all...] |
H A D | psp_v3_1.c | 111 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v3_1_bootloader_load_sysdrv() 114 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v3_1_bootloader_load_sysdrv() 152 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v3_1_bootloader_load_sos() 155 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v3_1_bootloader_load_sos() 202 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v3_1_reroute_ih() 203 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v3_1_reroute_ih() 204 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih() 214 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v3_1_reroute_ih() 215 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v3_1_reroute_ih() 216 WREG32_SOC15(MP in psp_v3_1_reroute_ih() [all...] |
H A D | mmhub_v2_0.c | 182 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v2_0_init_gart_aperture_regs() 184 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v2_0_init_gart_aperture_regs() 187 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v2_0_init_gart_aperture_regs() 189 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v2_0_init_gart_aperture_regs() 199 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BASE, 0); in mmhub_v2_0_init_system_aperture_regs() 200 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_TOP, 0); in mmhub_v2_0_init_system_aperture_regs() 201 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BOT, 0x00FFFFFF); in mmhub_v2_0_init_system_aperture_regs() 205 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v2_0_init_system_aperture_regs() 207 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v2_0_init_system_aperture_regs() 214 WREG32_SOC15(MMHU in mmhub_v2_0_init_system_aperture_regs() [all...] |
H A D | navi10_ih.c | 76 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); in force_update_wptr_for_self_int() 80 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl); in force_update_wptr_for_self_int() 81 WREG32_SOC15(OSSSYS, 0, mmIH_CNTL2, ih_cntl); in force_update_wptr_for_self_int() 103 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in navi10_ih_enable_interrupts() 119 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); in navi10_ih_enable_interrupts() 135 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl); in navi10_ih_enable_interrupts() 160 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in navi10_ih_disable_interrupts() 164 WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0); in navi10_ih_disable_interrupts() 165 WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR, 0); in navi10_ih_disable_interrupts() 180 WREG32_SOC15(OSSSY in navi10_ih_disable_interrupts() [all...] |
H A D | gfxhub_v2_0.c | 140 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs() 142 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs() 145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs() 147 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs() 157 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_0_init_system_aperture_regs() 158 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, 0); in gfxhub_v2_0_init_system_aperture_regs() 159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, 0x00FFFFFF); in gfxhub_v2_0_init_system_aperture_regs() 162 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_0_init_system_aperture_regs() 164 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_0_init_system_aperture_regs() 170 WREG32_SOC15(G in gfxhub_v2_0_init_system_aperture_regs() [all...] |
H A D | vcn_v2_0.c | 338 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 340 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 342 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v2_0_mc_resume() 345 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 347 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 350 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v2_0_mc_resume() 354 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v2_0_mc_resume() 357 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 359 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 361 WREG32_SOC15(UV in vcn_v2_0_mc_resume() [all...] |