Home
last modified time | relevance | path

Searched refs:WB_EC_CONFIG (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dwb.h59 SRI2(WB_EC_CONFIG, CNV, inst),\
107 SF(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, mask_sh),\
108 SF(WB_EC_CONFIG, DISPCLK_G_WB_GATE_DIS, mask_sh),\
109 SF(WB_EC_CONFIG, DISPCLK_G_WBSCL_GATE_DIS, mask_sh),\
110 SF(WB_EC_CONFIG, WB_TEST_CLK_SEL, mask_sh),\
111 SF(WB_EC_CONFIG, WB_LB_LS_DIS, mask_sh),\
112 SF(WB_EC_CONFIG, WB_LB_SD_DIS, mask_sh),\
113 SF(WB_EC_CONFIG, WB_LUT_LS_DIS, mask_sh),\
114 SF(WB_EC_CONFIG, WBSCL_LB_MEM_PWR_MODE_SEL, mask_sh),\
115 SF(WB_EC_CONFIG, WBSCL_LB_MEM_PWR_DI
359 uint32_t WB_EC_CONFIG; global() member
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dwb.h32 SRI2_DWB(WB_EC_CONFIG, CNV, inst),\
80 SF_DWB(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, mask_sh),\
81 SF_DWB(WB_EC_CONFIG, DISPCLK_G_WB_GATE_DIS, mask_sh),\
82 SF_DWB(WB_EC_CONFIG, DISPCLK_G_WBSCL_GATE_DIS, mask_sh),\
83 SF_DWB(WB_EC_CONFIG, WB_TEST_CLK_SEL, mask_sh),\
84 SF_DWB(WB_EC_CONFIG, WB_LB_LS_DIS, mask_sh),\
85 SF_DWB(WB_EC_CONFIG, WB_LB_SD_DIS, mask_sh),\
86 SF_DWB(WB_EC_CONFIG, WB_LUT_LS_DIS, mask_sh),\
87 SF_DWB(WB_EC_CONFIG, WBSCL_LB_MEM_PWR_MODE_SEL, mask_sh),\
88 SF_DWB(WB_EC_CONFIG, WBSCL_LB_MEM_PWR_DI
332 uint32_t WB_EC_CONFIG; global() member
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dwb.c74 REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 1, in dwb1_enable()
98 REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 0, in dwb1_disable()
H A Ddcn10_dwb.h55 SRI(WB_EC_CONFIG, CNV, inst),\
218 uint32_t WB_EC_CONFIG; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dwb.c72 REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 1, in dwb1_enable()
96 REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 0, in dwb1_disable()
H A Ddcn10_dwb.h53 SRI(WB_EC_CONFIG, CNV, inst),\
216 uint32_t WB_EC_CONFIG; member

Completed in 3 milliseconds