/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | vegam_smumgr.c | 1212 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in vegam_populate_smc_vce_level() 1213 table->VceLevel[count].MinVoltage = 0; in vegam_populate_smc_vce_level() 1214 table->VceLevel[count].MinVoltage |= in vegam_populate_smc_vce_level() 1226 table->VceLevel[count].MinVoltage |= in vegam_populate_smc_vce_level() 1228 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in vegam_populate_smc_vce_level() 1232 table->VceLevel[count].Frequency, ÷rs); in vegam_populate_smc_vce_level() 1237 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in vegam_populate_smc_vce_level() 1239 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in vegam_populate_smc_vce_level() 1240 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in vegam_populate_smc_vce_level()
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H A D | fiji_smumgr.c | 1434 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in fiji_populate_smc_vce_level() 1435 table->VceLevel[count].MinVoltage = 0; in fiji_populate_smc_vce_level() 1436 table->VceLevel[count].MinVoltage |= in fiji_populate_smc_vce_level() 1438 table->VceLevel[count].MinVoltage |= in fiji_populate_smc_vce_level() 1441 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in fiji_populate_smc_vce_level() 1445 table->VceLevel[count].Frequency, ÷rs); in fiji_populate_smc_vce_level() 1450 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_vce_level() 1452 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in fiji_populate_smc_vce_level() 1453 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in fiji_populate_smc_vce_level()
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H A D | polaris10_smumgr.c | 1304 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in polaris10_populate_smc_vce_level() 1305 table->VceLevel[count].MinVoltage = 0; in polaris10_populate_smc_vce_level() 1306 table->VceLevel[count].MinVoltage |= in polaris10_populate_smc_vce_level() 1318 table->VceLevel[count].MinVoltage |= in polaris10_populate_smc_vce_level() 1320 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in polaris10_populate_smc_vce_level() 1324 table->VceLevel[count].Frequency, ÷rs); in polaris10_populate_smc_vce_level() 1329 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_vce_level() 1331 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in polaris10_populate_smc_vce_level() 1332 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in polaris10_populate_smc_vce_level()
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H A D | tonga_smumgr.c | 1384 table->VceLevel[count].Frequency = in tonga_populate_smc_vce_level() 1386 table->VceLevel[count].MinVoltage.Vddc = in tonga_populate_smc_vce_level() 1389 table->VceLevel[count].MinVoltage.VddGfx = in tonga_populate_smc_vce_level() 1393 table->VceLevel[count].MinVoltage.Vddci = in tonga_populate_smc_vce_level() 1396 table->VceLevel[count].MinVoltage.Phases = 1; in tonga_populate_smc_vce_level() 1400 table->VceLevel[count].Frequency, ÷rs); in tonga_populate_smc_vce_level() 1405 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_vce_level() 1407 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in tonga_populate_smc_vce_level()
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H A D | ci_smumgr.c | 1571 table->VceLevel[count].Frequency = vce_table->entries[count].evclk; in ci_populate_smc_vce_level() 1572 table->VceLevel[count].MinVoltage = in ci_populate_smc_vce_level() 1574 table->VceLevel[count].MinPhases = 1; in ci_populate_smc_vce_level() 1577 table->VceLevel[count].Frequency, ÷rs); in ci_populate_smc_vce_level() 1582 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_vce_level() 1584 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in ci_populate_smc_vce_level() 1585 CONVERT_FROM_HOST_TO_SMC_US(table->VceLevel[count].MinVoltage); in ci_populate_smc_vce_level()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | vegam_smumgr.c | 1211 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in vegam_populate_smc_vce_level() 1212 table->VceLevel[count].MinVoltage = 0; in vegam_populate_smc_vce_level() 1213 table->VceLevel[count].MinVoltage |= in vegam_populate_smc_vce_level() 1225 table->VceLevel[count].MinVoltage |= in vegam_populate_smc_vce_level() 1227 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in vegam_populate_smc_vce_level() 1231 table->VceLevel[count].Frequency, ÷rs); in vegam_populate_smc_vce_level() 1236 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in vegam_populate_smc_vce_level() 1238 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in vegam_populate_smc_vce_level() 1239 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in vegam_populate_smc_vce_level()
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H A D | fiji_smumgr.c | 1433 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in fiji_populate_smc_vce_level() 1434 table->VceLevel[count].MinVoltage = 0; in fiji_populate_smc_vce_level() 1435 table->VceLevel[count].MinVoltage |= in fiji_populate_smc_vce_level() 1437 table->VceLevel[count].MinVoltage |= in fiji_populate_smc_vce_level() 1440 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in fiji_populate_smc_vce_level() 1444 table->VceLevel[count].Frequency, ÷rs); in fiji_populate_smc_vce_level() 1449 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_vce_level() 1451 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in fiji_populate_smc_vce_level() 1452 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in fiji_populate_smc_vce_level()
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H A D | polaris10_smumgr.c | 1382 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in polaris10_populate_smc_vce_level() 1383 table->VceLevel[count].MinVoltage = 0; in polaris10_populate_smc_vce_level() 1384 table->VceLevel[count].MinVoltage |= in polaris10_populate_smc_vce_level() 1396 table->VceLevel[count].MinVoltage |= in polaris10_populate_smc_vce_level() 1398 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in polaris10_populate_smc_vce_level() 1402 table->VceLevel[count].Frequency, ÷rs); in polaris10_populate_smc_vce_level() 1407 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_vce_level() 1409 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in polaris10_populate_smc_vce_level() 1410 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in polaris10_populate_smc_vce_level()
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H A D | tonga_smumgr.c | 1384 table->VceLevel[count].Frequency = in tonga_populate_smc_vce_level() 1386 table->VceLevel[count].MinVoltage.Vddc = in tonga_populate_smc_vce_level() 1389 table->VceLevel[count].MinVoltage.VddGfx = in tonga_populate_smc_vce_level() 1393 table->VceLevel[count].MinVoltage.Vddci = in tonga_populate_smc_vce_level() 1396 table->VceLevel[count].MinVoltage.Phases = 1; in tonga_populate_smc_vce_level() 1400 table->VceLevel[count].Frequency, ÷rs); in tonga_populate_smc_vce_level() 1405 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_vce_level() 1407 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in tonga_populate_smc_vce_level()
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H A D | ci_smumgr.c | 1572 table->VceLevel[count].Frequency = vce_table->entries[count].evclk; in ci_populate_smc_vce_level() 1573 table->VceLevel[count].MinVoltage = in ci_populate_smc_vce_level() 1575 table->VceLevel[count].MinPhases = 1; in ci_populate_smc_vce_level() 1578 table->VceLevel[count].Frequency, ÷rs); in ci_populate_smc_vce_level() 1583 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_vce_level() 1585 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in ci_populate_smc_vce_level() 1586 CONVERT_FROM_HOST_TO_SMC_US(table->VceLevel[count].MinVoltage); in ci_populate_smc_vce_level()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/ |
H A D | smu7_fusion.h | 236 SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
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H A D | smu7_discrete.h | 329 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
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H A D | smu75_discrete.h | 293 SMU75_Discrete_ExtClkLevel VceLevel [SMU75_MAX_LEVELS_VCE]; member
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H A D | smu74_discrete.h | 287 SMU74_Discrete_ExtClkLevel VceLevel[SMU74_MAX_LEVELS_VCE]; member
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H A D | smu72_discrete.h | 271 SMU72_Discrete_ExtClkLevel VceLevel[SMU72_MAX_LEVELS_VCE]; member
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H A D | smu73_discrete.h | 255 SMU73_Discrete_ExtClkLevel VceLevel [SMU73_MAX_LEVELS_VCE]; member
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/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
H A D | smu7_fusion.h | 236 SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
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H A D | smu7_discrete.h | 328 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | smu7_fusion.h | 227 SMU7_Fusion_ExtClkLevel VceLevel[SMU7_MAX_LEVELS_VCE]; member
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H A D | smu7_discrete.h | 329 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
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H A D | smu75_discrete.h | 293 SMU75_Discrete_ExtClkLevel VceLevel [SMU75_MAX_LEVELS_VCE]; member
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H A D | smu74_discrete.h | 288 SMU74_Discrete_ExtClkLevel VceLevel[SMU74_MAX_LEVELS_VCE]; member
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H A D | smu72_discrete.h | 271 SMU72_Discrete_ExtClkLevel VceLevel[SMU72_MAX_LEVELS_VCE]; member
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/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
H A D | smu7_fusion.h | 236 SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
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H A D | smu7_discrete.h | 328 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
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