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Searched refs:VOP_REG_MASK_SYNC (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
H A Drockchip_vop_reg.c36 #define VOP_REG_MASK_SYNC(off, _mask, _shift) \ macro
214 .status = VOP_REG_MASK_SYNC(PX30_INTR_STATUS, 0xffff, 0),
215 .enable = VOP_REG_MASK_SYNC(PX30_INTR_EN, 0xffff, 0),
216 .clear = VOP_REG_MASK_SYNC(PX30_INTR_CLEAR, 0xffff, 0),
714 .status = VOP_REG_MASK_SYNC(RK3368_INTR_STATUS, 0x3fff, 0),
715 .enable = VOP_REG_MASK_SYNC(RK3368_INTR_EN, 0x3fff, 0),
716 .clear = VOP_REG_MASK_SYNC(RK3368_INTR_CLEAR, 0x3fff, 0),
804 .status = VOP_REG_MASK_SYNC(RK3366_INTR_STATUS0, 0xffff, 0),
805 .enable = VOP_REG_MASK_SYNC(RK3366_INTR_EN0, 0xffff, 0),
806 .clear = VOP_REG_MASK_SYNC(RK3366_INTR_CLEAR
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/rockchip/
H A Drockchip_vop_reg.c36 #define VOP_REG_MASK_SYNC(off, _mask, _shift) \ macro
234 .status = VOP_REG_MASK_SYNC(PX30_INTR_STATUS, 0xffff, 0),
235 .enable = VOP_REG_MASK_SYNC(PX30_INTR_EN, 0xffff, 0),
236 .clear = VOP_REG_MASK_SYNC(PX30_INTR_CLEAR, 0xffff, 0),
764 .status = VOP_REG_MASK_SYNC(RK3368_INTR_STATUS, 0x3fff, 0),
765 .enable = VOP_REG_MASK_SYNC(RK3368_INTR_EN, 0x3fff, 0),
766 .clear = VOP_REG_MASK_SYNC(RK3368_INTR_CLEAR, 0x3fff, 0),
856 .status = VOP_REG_MASK_SYNC(RK3366_INTR_STATUS0, 0xffff, 0),
857 .enable = VOP_REG_MASK_SYNC(RK3366_INTR_EN0, 0xffff, 0),
858 .clear = VOP_REG_MASK_SYNC(RK3366_INTR_CLEAR
[all...]

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