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Searched refs:VLEUIMML (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/arch/powerpc/xmon/
H A Dppc-opc.c899 /* The VLEUIMML field in a D form instruction. */
900 #define VLEUIMML VLEUIMM + 1
904 #define XS6 VLEUIMML + 1
2278 /* The VLEUIMML field in an I16L form instruction. This is split. */
7097 {"e_lis", I16L(28,28), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
7098 {"e_and2is.", I16L(28,29), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
7099 {"e_or2is", I16L(28,26), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
7100 {"e_and2i.", I16L(28,25), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
7101 {"e_or2i", I16L(28,24), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
898 #define VLEUIMML global() macro
/kernel/linux/linux-6.6/arch/powerpc/xmon/
H A Dppc-opc.c899 /* The VLEUIMML field in a D form instruction. */
900 #define VLEUIMML VLEUIMM + 1
904 #define XS6 VLEUIMML + 1
2278 /* The VLEUIMML field in an I16L form instruction. This is split. */
7097 {"e_lis", I16L(28,28), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
7098 {"e_and2is.", I16L(28,29), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
7099 {"e_or2is", I16L(28,26), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
7100 {"e_and2i.", I16L(28,25), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
7101 {"e_or2i", I16L(28,24), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},
898 #define VLEUIMML global() macro

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