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Searched refs:VIU_SW_RESET (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/meson/
H A Dmeson_osd_afbcd.c85 priv->io_base + _REG(VIU_SW_RESET)); in meson_gxm_afbcd_reset()
86 writel_relaxed(0, priv->io_base + _REG(VIU_SW_RESET)); in meson_gxm_afbcd_reset()
284 VIU_SW_RESET); in meson_g12a_afbcd_reset()
285 meson_rdma_writel_sync(priv, 0, VIU_SW_RESET); in meson_g12a_afbcd_reset()
H A Dmeson_viu.c327 priv->io_base + _REG(VIU_SW_RESET)); in meson_viu_osd1_reset()
329 priv->io_base + _REG(VIU_SW_RESET)); in meson_viu_osd1_reset()
H A Dmeson_registers.h140 #define VIU_SW_RESET 0x1a01 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/meson/
H A Dmeson_osd_afbcd.c85 priv->io_base + _REG(VIU_SW_RESET)); in meson_gxm_afbcd_reset()
86 writel_relaxed(0, priv->io_base + _REG(VIU_SW_RESET)); in meson_gxm_afbcd_reset()
284 VIU_SW_RESET); in meson_g12a_afbcd_reset()
285 meson_rdma_writel_sync(priv, 0, VIU_SW_RESET); in meson_g12a_afbcd_reset()
H A Dmeson_viu.c327 priv->io_base + _REG(VIU_SW_RESET)); in meson_viu_osd1_reset()
329 priv->io_base + _REG(VIU_SW_RESET)); in meson_viu_osd1_reset()
H A Dmeson_registers.h140 #define VIU_SW_RESET 0x1a01 macro

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