Searched refs:VEBOX_RING_BASE (Results 1 - 12 of 12) sorted by relevance
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/ |
| H A D | intel_engine_regs.h | 44 #define GEN6_VEBSYNC (RING_SYNC_0(VEBOX_RING_BASE))
45 #define GEN6_VERSYNC (RING_SYNC_1(VEBOX_RING_BASE))
46 #define GEN6_VEVSYNC (RING_SYNC_2(VEBOX_RING_BASE))
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| H A D | intel_rc6.c | 476 (intel_uncore_read(uncore, PWRCTX_MAXCNT(VEBOX_RING_BASE)) & IDLE_TIME_MASK) > 1)) { in bxt_check_bios_rc6_setup()
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| H A D | intel_engine_cs.c | 198 { .graphics_ver = 7, .base = VEBOX_RING_BASE }
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/ |
| H A D | mmio_context.c | 129 {VECS0, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */
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| H A D | handlers.c | 1914 MMIO_F(prefix(VEBOX_RING_BASE), s, f, am, rm, d, r, w); \
3369 MMIO_F(GEN8_RING_CS_GPR(VEBOX_RING_BASE, 0), 0x40, F_CMD_ACCESS, in init_bxt_mmio_info()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/ |
| H A D | mmio_context.c | 135 {VECS0, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */
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| H A D | handlers.c | 2162 MMIO_F(prefix(VEBOX_RING_BASE), s, f, am, rm, d, r, w); \
2787 MMIO_F(GEN8_RING_CS_GPR(VEBOX_RING_BASE, 0), 0x40, F_CMD_ACCESS, in init_bxt_mmio_info()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/ |
| H A D | intel_gvt_mmio_table.c | 39 MMIO_F(prefix(VEBOX_RING_BASE), s); \
1244 MMIO_F(GEN8_RING_CS_GPR(VEBOX_RING_BASE, 0), 0x40); in iterate_bxt_mmio()
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| H A D | i915_reg.h | 908 #define VEBOX_RING_BASE 0x1a000 macro
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| H A D | intel_engine_cs.c | 130 { .gen = 7, .base = VEBOX_RING_BASE }
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | intel_uncore.c | 951 RING_TAIL(VEBOX_RING_BASE), /* 0x1a000 (base) */
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| H A D | i915_reg.h | 2504 #define VEBOX_RING_BASE 0x1a000 macro
2525 #define GEN6_VEBSYNC (RING_SYNC_0(VEBOX_RING_BASE))
2526 #define GEN6_VERSYNC (RING_SYNC_1(VEBOX_RING_BASE))
2527 #define GEN6_VEVSYNC (RING_SYNC_2(VEBOX_RING_BASE))
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