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Searched refs:VC5_PRIM_SRC_SHDN (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-versaclock5.c49 #define VC5_PRIM_SRC_SHDN 0x10 macro
236 ret = regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &src); in vc5_mux_get_parent()
280 return regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN, mask, src); in vc5_mux_set_parent()
297 ret = regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &premul); in vc5_dbl_recalc_rate()
328 return regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN, in vc5_dbl_set_rate()
994 ret = regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN, src_mask, in vc5_probe()
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-versaclock5.c50 #define VC5_PRIM_SRC_SHDN 0x10 macro
234 regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &src); in vc5_mux_get_parent()
275 return regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN, mask, src); in vc5_mux_set_parent()
290 regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &premul); in vc5_dbl_recalc_rate()
318 regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN, in vc5_dbl_set_rate()

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