VC5_CLK_OUTPUT_CFG0_PWR_SHIFT (reference) in projects: kernel - OpenGrok search results

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Searched refs:VC5_CLK_OUTPUT_CFG0_PWR_SHIFT (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/
H A D	clk-versaclock5.c	`107 #define VC5_CLK_OUTPUT_CFG0_PWR_SHIFT 3 macro 108 #define VC5_CLK_OUTPUT_CFG0_PWR_MASK GENMASK(4, VC5_CLK_OUTPUT_CFG0_PWR_SHIFT) 109 #define VC5_CLK_OUTPUT_CFG0_PWR_18 (0<<VC5_CLK_OUTPUT_CFG0_PWR_SHIFT) 110 #define VC5_CLK_OUTPUT_CFG0_PWR_25 (2<<VC5_CLK_OUTPUT_CFG0_PWR_SHIFT) 111 #define VC5_CLK_OUTPUT_CFG0_PWR_33 (3<<VC5_CLK_OUTPUT_CFG0_PWR_SHIFT)`
/kernel/linux/linux-6.6/drivers/clk/
H A D	clk-versaclock5.c	`106 #define VC5_CLK_OUTPUT_CFG0_PWR_SHIFT 3 macro 107 #define VC5_CLK_OUTPUT_CFG0_PWR_MASK GENMASK(4, VC5_CLK_OUTPUT_CFG0_PWR_SHIFT) 108 #define VC5_CLK_OUTPUT_CFG0_PWR_18 (0<<VC5_CLK_OUTPUT_CFG0_PWR_SHIFT) 109 #define VC5_CLK_OUTPUT_CFG0_PWR_25 (2<<VC5_CLK_OUTPUT_CFG0_PWR_SHIFT) 110 #define VC5_CLK_OUTPUT_CFG0_PWR_33 (3<<VC5_CLK_OUTPUT_CFG0_PWR_SHIFT)`

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