| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v3_0.c | 918 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v3_0_start_dpg_mode()
979 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v3_0_start_dpg_mode()
1071 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v3_0_start() local
1510 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v3_0_stop()
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| H A D | vcn_v2_5.c | 794 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_5_start_dpg_mode()
855 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_5_start_dpg_mode()
952 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v2_5_start() local
1381 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v2_5_stop()
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| H A D | vcn_v2_0.c | 816 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_0_start_dpg_mode()
956 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v2_0_start()
1170 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v2_0_stop()
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| H A D | vcn_v1_0.c | 853 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v1_0_start_spg_mode()
984 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v1_0_start_dpg_mode()
1147 ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v1_0_stop_spg_mode()
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| H A D | uvd_v7_0.c | 881 UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v7_0_sriov_start() local
1012 UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v7_0_start()
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| H A D | uvd_v6_0.c | 771 WREG32(mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v6_0_start()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v2_5.c | 842 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_5_start_dpg_mode()
905 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_5_start_dpg_mode()
1000 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v2_5_start() local
1429 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v2_5_stop()
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| H A D | vcn_v4_0.c | 937 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK | UVD_VCPU_CNTL__BLK_RST_MASK; in vcn_v4_0_start_dpg_mode()
984 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v4_0_start_dpg_mode()
1071 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v4_0_start() local
1508 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v4_0_stop()
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| H A D | vcn_v4_0_3.c | 747 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v4_0_3_start_dpg_mode()
796 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v4_0_3_start_dpg_mode()
1069 UVD_VCPU_CNTL__CLK_EN_MASK, in vcn_v4_0_3_start() local
1070 ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v4_0_3_start()
1305 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v4_0_3_stop()
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| H A D | vcn_v2_0.c | 817 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_0_start_dpg_mode()
955 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v2_0_start()
1171 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v2_0_stop()
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| H A D | vcn_v3_0.c | 965 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v3_0_start_dpg_mode()
1026 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v3_0_start_dpg_mode()
1125 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v3_0_start() local
1571 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v3_0_stop()
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| H A D | vcn_v1_0.c | 854 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v1_0_start_spg_mode()
985 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v1_0_start_dpg_mode()
1143 ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v1_0_stop_spg_mode()
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| H A D | uvd_v7_0.c | 902 UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v7_0_sriov_start() local
1033 UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v7_0_start()
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| H A D | uvd_v6_0.c | 789 WREG32(mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v6_0_start()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_7_0_sh_mask.h | 665 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x00000200L macro
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| H A D | uvd_4_2_sh_mask.h | 547 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
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| H A D | uvd_3_1_sh_mask.h | 543 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
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| H A D | uvd_4_0_sh_mask.h | 768 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x00000200L macro
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| H A D | uvd_5_0_sh_mask.h | 579 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
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| H A D | uvd_6_0_sh_mask.h | 581 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_7_0_sh_mask.h | 665 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x00000200L macro
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| H A D | uvd_3_1_sh_mask.h | 543 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
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| H A D | uvd_4_2_sh_mask.h | 547 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
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| H A D | uvd_4_0_sh_mask.h | 768 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x00000200L macro
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_sh_mask.h | 1187 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x00000200L macro
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