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Searched refs:TV_CTL (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_tv.c909 u32 tmp = intel_de_read(dev_priv, TV_CTL); in intel_tv_get_hw_state()
929 intel_de_write(dev_priv, TV_CTL, in intel_enable_tv()
930 intel_de_read(dev_priv, TV_CTL) | TV_ENC_ENABLE); in intel_enable_tv()
942 intel_de_write(dev_priv, TV_CTL, in intel_disable_tv()
943 intel_de_read(dev_priv, TV_CTL) & ~TV_ENC_ENABLE); in intel_disable_tv()
1098 tv_ctl = intel_de_read(dev_priv, TV_CTL); in intel_tv_get_config()
1439 tv_ctl = intel_de_read(dev_priv, TV_CTL); in intel_tv_pre_enable()
1566 intel_de_write(dev_priv, TV_CTL, tv_ctl); in intel_tv_pre_enable()
1591 save_tv_ctl = tv_ctl = intel_de_read(dev_priv, TV_CTL); in intel_tv_detect_type()
1617 intel_de_write(dev_priv, TV_CTL, tv_ct in intel_tv_detect_type()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_tv.c916 u32 tmp = intel_de_read(dev_priv, TV_CTL); in intel_tv_get_hw_state()
935 intel_de_rmw(dev_priv, TV_CTL, 0, TV_ENC_ENABLE); in intel_enable_tv()
947 intel_de_rmw(dev_priv, TV_CTL, TV_ENC_ENABLE, 0); in intel_disable_tv()
1108 tv_ctl = intel_de_read(dev_priv, TV_CTL); in intel_tv_get_config()
1460 tv_ctl = intel_de_read(dev_priv, TV_CTL); in intel_tv_pre_enable()
1587 intel_de_write(dev_priv, TV_CTL, tv_ctl); in intel_tv_pre_enable()
1611 save_tv_ctl = tv_ctl = intel_de_read(dev_priv, TV_CTL); in intel_tv_detect_type()
1637 intel_de_write(dev_priv, TV_CTL, tv_ctl); in intel_tv_detect_type()
1670 intel_de_write(dev_priv, TV_CTL, save_tv_ctl); in intel_tv_detect_type()
1671 intel_de_posting_read(dev_priv, TV_CTL); in intel_tv_detect_type()
[all...]
H A Dintel_tv_regs.h12 #define TV_CTL _MMIO(0x68000) macro
100 * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set
/kernel/linux/linux-5.10/drivers/video/fbdev/
H A Dcyber2000fb.h397 #define TV_CTL 0xbe4dc /* reflects a previous register- MVFCLR, MVPCLR etc P241*/ macro
/kernel/linux/linux-6.6/drivers/video/fbdev/
H A Dcyber2000fb.h397 #define TV_CTL 0xbe4dc /* reflects a previous register- MVFCLR, MVPCLR etc P241*/ macro
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Di915_reg.h5211 #define TV_CTL _MMIO(0x68000) macro
5299 * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set

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