Home
last modified time | relevance | path

Searched refs:TRCSSPCICRn (Results 1 - 5 of 5) sorted by relevance

/kernel/linux/linux-6.6/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-cfg.c83 } else if ((offset >= TRCSSCCRn(0)) && (offset <= TRCSSPCICRn(7))) { in etm4_cfg_map_reg_offset()
90 CHECKREGIDX(TRCSSPCICRn(0), ss_pe_cmp, idx, off_mask); in etm4_cfg_map_reg_offset()
H A Dcoresight-etm4x.h83 #define TRCSSPCICRn(n) (0x2C0 + (n * 4)) macro
384 CASE_##op((val), TRCSSPCICRn(0)) \
385 CASE_##op((val), TRCSSPCICRn(1)) \
386 CASE_##op((val), TRCSSPCICRn(2)) \
387 CASE_##op((val), TRCSSPCICRn(3)) \
388 CASE_##op((val), TRCSSPCICRn(4)) \
389 CASE_##op((val), TRCSSPCICRn(5)) \
390 CASE_##op((val), TRCSSPCICRn(6)) \
391 CASE_##op((val), TRCSSPCICRn(7)) \
H A Dcoresight-etm4x-core.c79 * Check if TRCSSPCICRn(i) is implemented for a given instance.
81 * TRCSSPCICRn is implemented only if :
482 etm4x_relaxed_write32(csa, config->ss_pe_cmp[i], TRCSSPCICRn(i)); in etm4_enable_hw()
1730 state->trcsspcicr[i] = etm4x_read32(csa, TRCSSPCICRn(i)); in __etm4_cpu_save()
1861 etm4x_relaxed_write32(csa, state->trcsspcicr[i], TRCSSPCICRn(i)); in __etm4_cpu_restore()
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
H A Dcoresight-etm4x.h76 #define TRCSSPCICRn(n) (0x2C0 + (n * 4)) macro
H A Dcoresight-etm4x-core.c180 drvdata->base + TRCSSPCICRn(i)); in etm4_enable_hw()
1228 state->trcsspcicr[i] = readl(drvdata->base + TRCSSPCICRn(i)); in etm4_cpu_save()
1347 drvdata->base + TRCSSPCICRn(i)); in etm4_cpu_restore()

Completed in 9 milliseconds