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Help
Searched
refs:TRCEVENTCTL0R
(Results
1 - 5
of
5
) sorted by relevance
/kernel/linux/linux-6.6/drivers/hwtracing/coresight/
H
A
D
coresight-etm4x-cfg.c
53
if (((offset >=
TRCEVENTCTL0R
) && (offset <= TRCVIPCSSCTLR)) ||
in etm4_cfg_map_reg_offset()
57
CHECKREG(
TRCEVENTCTL0R
, eventctrl0);
in etm4_cfg_map_reg_offset()
H
A
D
coresight-etm4x.h
31
#define
TRCEVENTCTL0R
0x020
macro
285
CASE_##op((val),
TRCEVENTCTL0R
) \
H
A
D
coresight-etm4x-core.c
441
etm4x_relaxed_write32(csa, config->eventctrl0,
TRCEVENTCTL0R
);
in etm4_enable_hw()
1688
state->trceventctl0r = etm4x_read32(csa,
TRCEVENTCTL0R
);
in __etm4_cpu_save()
1819
etm4x_relaxed_write32(csa, state->trceventctl0r,
TRCEVENTCTL0R
);
in __etm4_cpu_restore()
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
H
A
D
coresight-etm4x.h
29
#define
TRCEVENTCTL0R
0x020
macro
H
A
D
coresight-etm4x-core.c
132
writel_relaxed(config->eventctrl0, drvdata->base +
TRCEVENTCTL0R
);
in etm4_enable_hw()
1189
state->trceventctl0r = readl(drvdata->base +
TRCEVENTCTL0R
);
in etm4_cpu_save()
1300
writel_relaxed(state->trceventctl0r, drvdata->base +
TRCEVENTCTL0R
);
in etm4_cpu_restore()
Completed in 13 milliseconds