Searched refs:TM_CPPR (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| H A D | xive-regs.h | 64 #define TM_CPPR 0x1 /* - + - + */ macro
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| H A D | xive-regs.h | 64 #define TM_CPPR 0x1 /* - + - + */ macro
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| /kernel/linux/linux-5.10/arch/powerpc/kvm/ |
| H A D | book3s_xive_template.c | 266 __x_writeb(xc->cppr, __x_tima + TM_QW1_OS + TM_CPPR); in GLUE()
496 __x_writeb(cppr, __x_tima + TM_QW1_OS + TM_CPPR); in GLUE()
601 __x_writeb(xc->cppr, __x_tima + TM_QW1_OS + TM_CPPR); in GLUE()
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| /kernel/linux/linux-5.10/arch/powerpc/sysdev/xive/ |
| H A D | common.c | 186 out_8(xive_tima + xive_tima_offset + TM_CPPR, prio); in xive_scan_interrupts()
1381 out_8(xive_tima + xive_tima_offset + TM_CPPR, 0xff); in xive_setup_cpu()
1474 out_8(xive_tima + xive_tima_offset + TM_CPPR, 0); in xive_smp_disable_cpu()
1481 out_8(xive_tima + xive_tima_offset + TM_CPPR, 0xff); in xive_smp_disable_cpu()
1504 out_8(xive_tima + xive_tima_offset + TM_CPPR, 0); in xive_teardown_cpu()
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| /kernel/linux/linux-6.6/arch/powerpc/sysdev/xive/ |
| H A D | common.c | 207 out_8(xive_tima + xive_tima_offset + TM_CPPR, prio); in xive_scan_interrupts()
1522 out_8(xive_tima + xive_tima_offset + TM_CPPR, 0xff); in xive_setup_cpu()
1614 out_8(xive_tima + xive_tima_offset + TM_CPPR, 0); in xive_smp_disable_cpu()
1621 out_8(xive_tima + xive_tima_offset + TM_CPPR, 0xff); in xive_smp_disable_cpu()
1644 out_8(xive_tima + xive_tima_offset + TM_CPPR, 0); in xive_teardown_cpu()
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| /kernel/linux/linux-6.6/arch/powerpc/kvm/ |
| H A D | book3s_xive.c | 281 __raw_writeb(xc->cppr, xive_tima + TM_QW1_OS + TM_CPPR); in xive_vm_scan_interrupts()
510 __raw_writeb(cppr, xive_tima + TM_QW1_OS + TM_CPPR); in xive_vm_h_cppr()
615 __raw_writeb(xc->cppr, xive_tima + TM_QW1_OS + TM_CPPR); in xive_vm_h_eoi()
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