Searched refs:TEGRA_CLK_RESET_BASE (Results 1 - 14 of 14) sorted by relevance
| /kernel/linux/linux-5.10/arch/arm/include/debug/ |
| H A D | tegra.S | 21 #define TEGRA_CLK_RESET_BASE 0x60006000 define
30 #define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
31 #define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
32 #define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
33 #define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
34 #define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
35 #define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
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| /kernel/linux/linux-6.6/arch/arm/include/debug/ |
| H A D | tegra.S | 21 #define TEGRA_CLK_RESET_BASE 0x60006000 define
30 #define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
31 #define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
32 #define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
33 #define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
34 #define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
35 #define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
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| /kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
| H A D | sleep-tegra30.S | 251 mov32 r5, TEGRA_CLK_RESET_BASE
321 mov32 r0, TEGRA_CLK_RESET_BASE
553 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
554 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
564 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
565 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
580 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
581 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
613 * r5 = TEGRA_CLK_RESET_BASE
729 * r5 = TEGRA_CLK_RESET_BASE
[all...] |
| H A D | iomap.h | 40 #define TEGRA_CLK_RESET_BASE 0x60006000 macro
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| H A D | sleep.h | 16 #define TEGRA_CLK_RESET_VIRT (TEGRA_CLK_RESET_BASE - IO_PPSB_PHYS \
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| H A D | sleep.S | 142 mov32 r5, TEGRA_CLK_RESET_BASE
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| H A D | sleep-tegra20.S | 171 mov32 r0, TEGRA_CLK_RESET_BASE
363 mov32 r5, TEGRA_CLK_RESET_BASE
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| H A D | reset-handler.S | 241 mov32 r7, TEGRA_CLK_RESET_BASE
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| /kernel/linux/linux-6.6/arch/arm/mach-tegra/ |
| H A D | sleep-tegra30.S | 300 mov32 r5, TEGRA_CLK_RESET_BASE
370 mov32 r0, TEGRA_CLK_RESET_BASE
598 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
599 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
609 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
610 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
625 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
626 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
661 * r5 = TEGRA_CLK_RESET_BASE
785 * r5 = TEGRA_CLK_RESET_BASE
[all...] |
| H A D | sleep.h | 16 #define TEGRA_CLK_RESET_VIRT (TEGRA_CLK_RESET_BASE - IO_PPSB_PHYS \
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| H A D | sleep.S | 144 mov32 r5, TEGRA_CLK_RESET_BASE
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| H A D | iomap.h | 40 #define TEGRA_CLK_RESET_BASE 0x60006000 macro
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| H A D | sleep-tegra20.S | 196 mov32 r0, TEGRA_CLK_RESET_BASE
392 mov32 r5, TEGRA_CLK_RESET_BASE
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| H A D | reset-handler.S | 243 mov32 r7, TEGRA_CLK_RESET_BASE
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