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Help
Searched
refs:Ser1SDCR0
(Results
1 - 10
of
10
) sorted by relevance
/kernel/linux/linux-5.10/arch/arm/mach-sa1100/
H
A
D
pm.c
70
SAVE(
Ser1SDCR0
);
in sa11x0_pm_enter()
104
RESTORE(
Ser1SDCR0
);
in sa11x0_pm_enter()
H
A
D
nanoengine.c
93
Ser1SDCR0
|= SDCR0_UART;
in nanoengine_map_io()
H
A
D
hackkit.c
85
Ser1SDCR0
|= SDCR0_SUS;
in hackkit_map_io()
H
A
D
shannon.c
137
Ser1SDCR0
|= SDCR0_SUS;
in shannon_map_io()
H
A
D
badge4.c
309
Ser1SDCR0
|= SDCR0_UART;
in badge4_uart_pm()
H
A
D
assabet.c
716
Ser1SDCR0
|= SDCR0_SUS;
in assabet_map_io()
/kernel/linux/linux-6.6/arch/arm/mach-sa1100/
H
A
D
pm.c
72
SAVE(
Ser1SDCR0
);
in sa11x0_pm_enter()
106
RESTORE(
Ser1SDCR0
);
in sa11x0_pm_enter()
H
A
D
assabet.c
689
Ser1SDCR0
|= SDCR0_SUS;
in assabet_map_io()
/kernel/linux/linux-5.10/arch/arm/mach-sa1100/include/mach/
H
A
D
SA-1100.h
406
*
Ser1SDCR0
Serial port 1 Synchronous Data Link Controller (SDLC)
429
#define
Ser1SDCR0
__REG(0x80020060) /* Ser. port 1 SDLC Control Reg. 0 */
macro
/kernel/linux/linux-6.6/arch/arm/mach-sa1100/include/mach/
H
A
D
SA-1100.h
406
*
Ser1SDCR0
Serial port 1 Synchronous Data Link Controller (SDLC)
429
#define
Ser1SDCR0
__REG(0x80020060) /* Ser. port 1 SDLC Control Reg. 0 */
macro
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