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Searched refs:SYSC_REG_SYSTEM_CONFIG0 (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/arch/mips/include/asm/mach-ralink/
H A Dmt7621.h18 #define SYSC_REG_SYSTEM_CONFIG0 0x10 macro
H A Dmt7620.h20 #define SYSC_REG_SYSTEM_CONFIG0 0x10 macro
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-ralink/
H A Dmt7620.h21 #define SYSC_REG_SYSTEM_CONFIG0 0x10 macro
H A Dmt7621.h20 #define SYSC_REG_SYSTEM_CONFIG0 0x10 macro
/kernel/linux/linux-6.6/arch/mips/ralink/
H A Dmt7620.c231 cfg0 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_SYSTEM_CONFIG0); in prom_soc_init()
/kernel/linux/linux-5.10/arch/mips/ralink/
H A Dmt7620.c386 reg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0); in mt7620_get_xtal_rate()
690 cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0); in prom_soc_init()
/kernel/linux/linux-6.6/drivers/clk/ralink/
H A Dclk-mt7621.c20 #define SYSC_REG_SYSTEM_CONFIG0 0x10 macro
243 regmap_read(sysc, SYSC_REG_SYSTEM_CONFIG0, &val); in mt7621_xtal_recalc_rate()
/kernel/linux/linux-5.10/drivers/staging/mt7621-pci-phy/
H A Dpci-mt7621-phy.c144 xtal_mode = (rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0) in mt7621_set_phy_for_ssc()

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