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Searched refs:SKL_DPLL0 (Results 1 - 5 of 5) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_cdclk.c856 (val & (DPLL_CTRL1_HDMI_MODE(SKL_DPLL0) | in skl_dpll0_update()
857 DPLL_CTRL1_SSC(SKL_DPLL0) | in skl_dpll0_update()
858 DPLL_CTRL1_OVERRIDE(SKL_DPLL0))) != in skl_dpll0_update()
859 DPLL_CTRL1_OVERRIDE(SKL_DPLL0))) in skl_dpll0_update()
862 switch (val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0)) { in skl_dpll0_update()
863 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, SKL_DPLL0): in skl_dpll0_update()
864 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1350, SKL_DPLL0): in skl_dpll0_update()
865 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1620, SKL_DPLL0): in skl_dpll0_update()
866 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2700, SKL_DPLL0): in skl_dpll0_update()
869 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080, SKL_DPLL0) in skl_dpll0_update()
[all...]
H A Dintel_dpll_mgr.h357 #define SKL_DPLL0 0 macro
H A Dintel_display.c10848 if (drm_WARN_ON(&dev_priv->drm, id < SKL_DPLL0 || id > SKL_DPLL2)) in cnl_get_ddi_pll()
10933 if (drm_WARN_ON(&dev_priv->drm, id < SKL_DPLL0 || id > SKL_DPLL3)) in skl_get_ddi_pll()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_cdclk.c895 (val & (DPLL_CTRL1_HDMI_MODE(SKL_DPLL0) | in skl_dpll0_update()
896 DPLL_CTRL1_SSC(SKL_DPLL0) | in skl_dpll0_update()
897 DPLL_CTRL1_OVERRIDE(SKL_DPLL0))) != in skl_dpll0_update()
898 DPLL_CTRL1_OVERRIDE(SKL_DPLL0))) in skl_dpll0_update()
901 switch (val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0)) { in skl_dpll0_update()
902 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, SKL_DPLL0): in skl_dpll0_update()
903 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1350, SKL_DPLL0): in skl_dpll0_update()
904 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1620, SKL_DPLL0): in skl_dpll0_update()
905 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2700, SKL_DPLL0): in skl_dpll0_update()
908 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080, SKL_DPLL0) in skl_dpll0_update()
[all...]
H A Dintel_dpll_mgr.h315 #define SKL_DPLL0 0 macro

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