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Searched refs:SDMA_OP_FENCE (Results 1 - 21 of 21) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v2_4.c313 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v2_4_ring_emit_fence()
321 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v2_4_ring_emit_fence()
H A Dsdma_v5_2.c421 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | in sdma_v5_2_ring_emit_fence()
432 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | in sdma_v5_2_ring_emit_fence()
H A Dsdma_v5_0.c487 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | in sdma_v5_0_ring_emit_fence()
498 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | in sdma_v5_0_ring_emit_fence()
H A Dsdma_v3_0.c487 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v3_0_ring_emit_fence()
495 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v3_0_ring_emit_fence()
H A Dsdma_v4_0.c926 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v4_0_ring_emit_fence()
936 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v4_0_ring_emit_fence()
H A Diceland_sdma_pkt_open.h30 #define SDMA_OP_FENCE 5 macro
H A Dtonga_sdma_pkt_open.h30 #define SDMA_OP_FENCE 5 macro
H A Dvega10_sdma_pkt_open.h30 #define SDMA_OP_FENCE 5 macro
H A Dnavi10_sdma_pkt_open.h30 #define SDMA_OP_FENCE 5 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v3_0.c485 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v3_0_ring_emit_fence()
493 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v3_0_ring_emit_fence()
H A Dsdma_v2_4.c311 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v2_4_ring_emit_fence()
319 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v2_4_ring_emit_fence()
H A Dsdma_v4_4_2.c393 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v4_4_2_ring_emit_fence()
403 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v4_4_2_ring_emit_fence()
H A Dsdma_v5_0.c520 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | in sdma_v5_0_ring_emit_fence()
531 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | in sdma_v5_0_ring_emit_fence()
H A Dsdma_v5_2.c325 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | in sdma_v5_2_ring_emit_fence()
336 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | in sdma_v5_2_ring_emit_fence()
H A Dsdma_v6_0.c343 amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_FENCE) | in sdma_v6_0_ring_emit_fence()
354 amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_FENCE) | in sdma_v6_0_ring_emit_fence()
H A Dsdma_v4_0.c842 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v4_0_ring_emit_fence()
852 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE)); in sdma_v4_0_ring_emit_fence()
H A Diceland_sdma_pkt_open.h30 #define SDMA_OP_FENCE 5 macro
H A Dtonga_sdma_pkt_open.h30 #define SDMA_OP_FENCE 5 macro
H A Dvega10_sdma_pkt_open.h30 #define SDMA_OP_FENCE 5 macro
H A Dnavi10_sdma_pkt_open.h30 #define SDMA_OP_FENCE 5 macro
H A Dsdma_v6_0_0_pkt_open.h30 #define SDMA_OP_FENCE 5 macro

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