Searched refs:SDMA1_HWIP (Results 1 - 18 of 18) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | navi12_reg_init.c | 46 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in navi12_reg_base_init()
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| H A D | navi14_reg_init.c | 46 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in navi14_reg_base_init()
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| H A D | navi10_reg_init.c | 46 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in navi10_reg_base_init()
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| H A D | sienna_cichlid_reg_init.c | 47 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in sienna_cichlid_reg_base_init()
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| H A D | arct_reg_init.c | 45 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in arct_reg_base_init()
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| H A D | vega20_reg_init.c | 47 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in vega20_reg_base_init()
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| H A D | vega10_reg_init.c | 48 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in vega10_reg_base_init()
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| H A D | amdgpu_discovery.c | 115 [SDMA1_HWIP] = SDMA1_HWID,
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| H A D | amdgpu.h | 691 SDMA1_HWIP, enumerator
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| H A D | sdma_v4_0.c | 382 return (adev->reg_offset[SDMA1_HWIP][0][0] + offset); in sdma_v4_0_get_reg_offset()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | aldebaran_reg_init.c | 44 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in aldebaran_reg_base_init()
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| H A D | dimgrey_cavefish_reg_init.c | 47 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
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| H A D | amdgpu_discovery.c | 184 [SDMA1_HWIP] = SDMA1_HWID,
2168 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2190 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2251 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2275 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2276 adev->ip_versions[SDMA1_HWIP][1] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2277 adev->ip_versions[SDMA1_HWIP][2] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2278 adev->ip_versions[SDMA1_HWIP][3] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2279 adev->ip_versions[SDMA1_HWIP][4] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2280 adev->ip_versions[SDMA1_HWIP][ in amdgpu_discovery_set_ip_blocks()
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| H A D | arct_reg_init.c | 45 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in arct_reg_base_init()
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| H A D | vega20_reg_init.c | 47 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in vega20_reg_base_init()
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| H A D | vega10_reg_init.c | 48 adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); in vega10_reg_base_init()
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| H A D | amdgpu.h | 639 SDMA1_HWIP, enumerator
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| H A D | sdma_v4_0.c | 401 return (adev->reg_offset[SDMA1_HWIP][0][0] + offset); in sdma_v4_0_get_reg_offset()
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