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Searched refs:SDMA0_ME_CNTL (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dcik_sdma.c346 me_cntl = RREG32(SDMA0_ME_CNTL + reg_offset); in cik_sdma_enable()
351 WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl); in cik_sdma_enable()
H A Dcik.c4964 tmp = RREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET); in cik_gpu_soft_reset()
4966 WREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET, tmp); in cik_gpu_soft_reset()
4970 tmp = RREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET); in cik_gpu_soft_reset()
4972 WREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET, tmp); in cik_gpu_soft_reset()
5167 tmp = RREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET); in cik_gpu_pci_config_reset()
5169 WREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET, tmp); in cik_gpu_pci_config_reset()
5171 tmp = RREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET); in cik_gpu_pci_config_reset()
5173 WREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET, tmp); in cik_gpu_pci_config_reset()
H A Dcikd.h1977 #define SDMA0_ME_CNTL 0xD048 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dcik_sdma.c345 me_cntl = RREG32(SDMA0_ME_CNTL + reg_offset); in cik_sdma_enable()
350 WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl); in cik_sdma_enable()
H A Dcik.c4954 tmp = RREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET); in cik_gpu_soft_reset()
4956 WREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET, tmp); in cik_gpu_soft_reset()
4960 tmp = RREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET); in cik_gpu_soft_reset()
4962 WREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET, tmp); in cik_gpu_soft_reset()
5157 tmp = RREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET); in cik_gpu_pci_config_reset()
5159 WREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET, tmp); in cik_gpu_pci_config_reset()
5161 tmp = RREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET); in cik_gpu_pci_config_reset()
5163 WREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET, tmp); in cik_gpu_pci_config_reset()
H A Dcikd.h1977 #define SDMA0_ME_CNTL 0xD048 macro

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