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Searched refs:SCR (Results 1 - 25 of 39) sorted by relevance

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/kernel/linux/linux-5.10/drivers/net/wan/
H A Dhdlc_ppp.c86 enum {INV = 0x10, IRC = 0x20, ZRC = 0x40, SCR = 0x80, SCA = 0x100, enumerator
282 {IRC|SCR|3, INV , INV , INV , INV , INV , INV }, /* START */
284 { INV , INV ,STR|2, SCR|3 ,SCR|3, SCR|5 , INV }, /* TO+ */
286 { STA|0 ,IRC|SCR|SCA|5, 2 , SCA|5 ,SCA|6, SCA|5 ,SCR|SCA|5}, /* RCR+ */
287 { STA|0 ,IRC|SCR|SCN|3, 2 , SCN|3 ,SCN|4, SCN|3 ,SCR|SCN|3}, /* RCR- */
288 { STA|0 , STA|1 , 2 , IRC|4 ,SCR|
[all...]
/kernel/linux/linux-6.6/drivers/net/wan/
H A Dhdlc_ppp.c86 enum {INV = 0x10, IRC = 0x20, ZRC = 0x40, SCR = 0x80, SCA = 0x100, enumerator
280 {IRC|SCR|3, INV , INV , INV , INV , INV , INV }, /* START */
282 { INV , INV ,STR|2, SCR|3 ,SCR|3, SCR|5 , INV }, /* TO+ */
284 { STA|0 ,IRC|SCR|SCA|5, 2 , SCA|5 ,SCA|6, SCA|5 ,SCR|SCA|5}, /* RCR+ */
285 { STA|0 ,IRC|SCR|SCN|3, 2 , SCN|3 ,SCN|4, SCN|3 ,SCR|SCN|3}, /* RCR- */
286 { STA|0 , STA|1 , 2 , IRC|4 ,SCR|
[all...]
/kernel/linux/linux-5.10/drivers/net/hamradio/
H A Dbaycom_ser_fdx.c101 #define SCR(iobase) (iobase+7) macro
362 outb(0x5a, SCR(iobase)); in ser12_check_uart()
363 b1 = inb(SCR(iobase)); in ser12_check_uart()
364 outb(0xa5, SCR(iobase)); in ser12_check_uart()
365 b2 = inb(SCR(iobase)); in ser12_check_uart()
H A Dbaycom_ser_hdx.c87 #define SCR(iobase) (iobase+7) macro
444 outb(0x5a, SCR(iobase)); in ser12_check_uart()
445 b1 = inb(SCR(iobase)); in ser12_check_uart()
446 outb(0xa5, SCR(iobase)); in ser12_check_uart()
447 b2 = inb(SCR(iobase)); in ser12_check_uart()
H A Dyam.c158 #define SCR(iobase) (iobase+7) macro
515 outb(0x5a, SCR(iobase)); in yam_check_uart()
516 b1 = inb(SCR(iobase)); in yam_check_uart()
517 outb(0xa5, SCR(iobase)); in yam_check_uart()
518 b2 = inb(SCR(iobase)); in yam_check_uart()
/kernel/linux/linux-6.6/drivers/net/hamradio/
H A Dbaycom_ser_fdx.c101 #define SCR(iobase) (iobase+7) macro
362 outb(0x5a, SCR(iobase)); in ser12_check_uart()
363 b1 = inb(SCR(iobase)); in ser12_check_uart()
364 outb(0xa5, SCR(iobase)); in ser12_check_uart()
365 b2 = inb(SCR(iobase)); in ser12_check_uart()
H A Dbaycom_ser_hdx.c87 #define SCR(iobase) (iobase+7) macro
444 outb(0x5a, SCR(iobase)); in ser12_check_uart()
445 b1 = inb(SCR(iobase)); in ser12_check_uart()
446 outb(0xa5, SCR(iobase)); in ser12_check_uart()
447 b2 = inb(SCR(iobase)); in ser12_check_uart()
H A Dyam.c158 #define SCR(iobase) (iobase+7) macro
515 outb(0x5a, SCR(iobase)); in yam_check_uart()
516 b1 = inb(SCR(iobase)); in yam_check_uart()
517 outb(0xa5, SCR(iobase)); in yam_check_uart()
518 b2 = inb(SCR(iobase)); in yam_check_uart()
/kernel/linux/linux-6.6/arch/m68k/68000/
H A Ddragen2.c45 SCR = 0x10; /* allow user access to internal registers */ in init_dragen2()
/kernel/linux/linux-5.10/arch/m68k/68000/
H A Dm68VZ328.c66 SCR = 0x10; /* allow user access to internal registers */ in init_hardware()
/kernel/linux/linux-5.10/drivers/clk/meson/
H A Dgxbb.h17 #define SCR 0x2C /* 0x0b offset in data sheet */ macro
/kernel/linux/linux-6.6/drivers/clk/meson/
H A Dgxbb.h17 #define SCR 0x2C /* 0x0b offset in data sheet */ macro
/kernel/linux/linux-5.10/drivers/tty/
H A Dsynclink_gt.c375 #define SCR 0x8c /* serial control */ macro
401 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
403 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
2701 unsigned short val = rd_reg16(info, SCR); in wait_mgsl_event()
2703 wr_reg16(info, SCR, (unsigned short)(val | IRQ_RXIDLE)); in wait_mgsl_event()
2766 wr_reg16(info, SCR, in wait_mgsl_event()
2767 (unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE)); in wait_mgsl_event()
3842 /* SCR (seria in enable_loopback()
[all...]
/kernel/linux/linux-6.6/drivers/tty/
H A Dsynclink_gt.c370 #define SCR 0x8c /* serial control */ macro
396 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
398 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
2684 unsigned short val = rd_reg16(info, SCR); in wait_mgsl_event()
2686 wr_reg16(info, SCR, (unsigned short)(val | IRQ_RXIDLE)); in wait_mgsl_event()
2749 wr_reg16(info, SCR, in wait_mgsl_event()
2750 (unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE)); in wait_mgsl_event()
3802 /* SCR (seria in enable_loopback()
[all...]
/kernel/liteos_m/arch/arm/cortex-m3/keil/
H A Dlos_interrupt.c121 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
H A Dlos_interrupt.c123 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
H A Dlos_interrupt.c123 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
H A Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
H A Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
H A Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m4/iar/
H A Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
H A Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
H A Dlos_interrupt.c123 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
H A Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
H A Dlos_interrupt.c123 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()

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