Searched refs:R_BCM1480_IMR_MAILBOX_0_CLR_CPU (Results 1 - 6 of 6) sorted by relevance
/kernel/linux/linux-5.10/arch/mips/sibyte/bcm1480/ |
H A D | smp.c | 33 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 34 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 35 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 36 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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H A D | irq.c | 279 IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_MAILBOX_0_CLR_CPU))); in arch_init_irq()
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/kernel/linux/linux-6.6/arch/mips/sibyte/bcm1480/ |
H A D | smp.c | 33 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 34 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 35 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 36 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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H A D | irq.c | 279 IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_MAILBOX_0_CLR_CPU))); in arch_init_irq()
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/kernel/linux/linux-5.10/arch/mips/include/asm/sibyte/ |
H A D | bcm1480_regs.h | 377 #define R_BCM1480_IMR_MAILBOX_0_CLR_CPU 0x00D0 macro
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/kernel/linux/linux-6.6/arch/mips/include/asm/sibyte/ |
H A D | bcm1480_regs.h | 377 #define R_BCM1480_IMR_MAILBOX_0_CLR_CPU 0x00D0 macro
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