Home
Sort by
last modified time
|
relevance
|
path
Repository(s)
applications
arkcompiler
base
build
commonlibrary
developtools
device
docs
domains
drivers
foundation
ide
interface
kernel
napi_generator
productdefine
test
third_party
vendor
select all
invert selection
clear
Full Search
Search through all text tokens(words,strings,identifiers,numbers) in index.
Definition
Only finds symbol definitions(where e.g a variable(function,...) is defined).
Symbol
Only finds symbol(e.g. methods classes,function,variables).
File Path
Path of the source file(use "/").If you want just exact path,enclose it in "".Source files end with: .jar/.bz2/.a/.h/.java...
History
History log comments.
Type
Any
Bzip(2)
C
Clojure
C#
C++
ELF
Erlang
Image file
Fortran
Golang
GZIP
Haskell
Jar
Java
Java class
JavaScript
Lisp
Lua
Pascal
Perl
PHP
Plain Text
PL/SQL
Python
Rust
Scala
Shell script
SQL
Tar
Tcl
Troff
UUEncoded
Visual Basic
XML
Zip
Type of analyzer used to filter file types include with selected(e.g. just C sources).
Help
Searched
refs:RREG32_SMC
(Results
1 - 25
of
55
) sorted by relevance
1
2
3
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H
A
D
ci_smc.c
116
u32 tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in ci_start_smc()
124
u32 tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in ci_reset_smc()
139
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in ci_stop_smc_clock()
148
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in ci_start_smc_clock()
157
u32 clk =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in ci_is_smc_running()
158
u32 pc_c =
RREG32_SMC
(SMC_PC_C);
in ci_is_smc_running()
176
tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
H
A
D
si_smc.c
115
u32 tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in si_start_smc()
131
tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in si_reset_smc()
145
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in si_stop_smc_clock()
154
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in si_start_smc_clock()
163
u32 rst =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in si_is_smc_running()
164
u32 clk =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in si_is_smc_running()
202
tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in si_wait_for_smc_inactive()
H
A
D
trinity_dpm.c
378
value =
RREG32_SMC
(GFX_POWER_GATING_CNTL);
in trinity_gfx_powergating_initialize()
506
if (
RREG32_SMC
(CC_SMU_TST_EFUSE1_MISC) & RB_BACKEND_DISABLE_MASK)
in trinity_gfx_powergating_enable()
507
WREG32_SMC(SMU_SCRATCH_A, (
RREG32_SMC
(SMU_SCRATCH_A) | 0x01));
in trinity_gfx_powergating_enable()
522
value =
RREG32_SMC
(PM_I_CNTL_1);
in trinity_gfx_dynamic_mgpg_enable()
527
value =
RREG32_SMC
(SMU_S_PG_CNTL);
in trinity_gfx_dynamic_mgpg_enable()
532
value =
RREG32_SMC
(SMU_S_PG_CNTL);
in trinity_gfx_dynamic_mgpg_enable()
536
value =
RREG32_SMC
(PM_I_CNTL_1);
in trinity_gfx_dynamic_mgpg_enable()
596
value =
RREG32_SMC
(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);
in trinity_set_divider_value()
606
value =
RREG32_SMC
(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix);
in trinity_set_divider_value()
618
value =
RREG32_SMC
(SMU_SCLK_DPM_STATE_0_CNTL_
in trinity_set_ds_dividers()
[all...]
H
A
D
ci_dpm.c
569
data =
RREG32_SMC
(config_regs->offset);
in ci_program_pt_config_registers()
871
tmp =
RREG32_SMC
(CG_THERMAL_INT);
in ci_thermal_set_temperature_range()
879
tmp =
RREG32_SMC
(CG_THERMAL_CTRL);
in ci_thermal_set_temperature_range()
894
u32 thermal_int =
RREG32_SMC
(CG_THERMAL_INT);
in ci_thermal_enable_alert()
926
tmp = (
RREG32_SMC
(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK) >> FDO_PWM_MODE_SHIFT;
in ci_fan_ctrl_set_static_mode()
928
tmp = (
RREG32_SMC
(CG_FDO_CTRL2) & TMIN_MASK) >> TMIN_SHIFT;
in ci_fan_ctrl_set_static_mode()
933
tmp =
RREG32_SMC
(CG_FDO_CTRL2) & ~TMIN_MASK;
in ci_fan_ctrl_set_static_mode()
937
tmp =
RREG32_SMC
(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;
in ci_fan_ctrl_set_static_mode()
958
duty100 = (
RREG32_SMC
(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;
in ci_thermal_setup_fan_table()
1002
tmp = (
RREG32_SMC
(CG_MULT_THERMAL_CTR
in ci_thermal_setup_fan_table()
[all...]
H
A
D
kv_smc.c
60
*enable_mask =
RREG32_SMC
(SMC_SYSCON_MSG_ARG_0);
in kv_dpm_get_enable_mask()
H
A
D
kv_dpm.c
299
data =
RREG32_SMC
(config_regs->offset);
in kv_program_pt_config_registers()
646
u32 tmp =
RREG32_SMC
(GENERAL_PWRMGT);
in kv_start_dpm()
661
u32 sclk_pwrmgt_cntl =
RREG32_SMC
(SCLK_PWRMGT_CNTL);
in kv_start_am()
671
u32 sclk_pwrmgt_cntl =
RREG32_SMC
(SCLK_PWRMGT_CNTL);
in kv_reset_am()
1177
thermal_int =
RREG32_SMC
(CG_THERMAL_INT_CTRL);
in kv_enable_thermal_int()
2441
nbdpmconfig1 =
RREG32_SMC
(NB_DPM_CONFIG_1);
in kv_program_nbps_index_settings()
2468
tmp =
RREG32_SMC
(CG_THERMAL_INT_CTRL);
in kv_set_thermal_temperature_range()
2806
(
RREG32_SMC
(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_SCLK_INDEX_MASK) >>
in kv_dpm_debugfs_print_current_performance_level()
2815
tmp = (
RREG32_SMC
(SMU_VOLTAGE_STATUS) & SMU_VOLTAGE_CURRENT_LEVEL_MASK) >>
in kv_dpm_debugfs_print_current_performance_level()
2829
(
RREG32_SMC
(TARGET_AND_CURRENT_PROFILE_INDE
in kv_dpm_get_current_sclk()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H
A
D
ci_smc.c
116
u32 tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in ci_start_smc()
124
u32 tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in ci_reset_smc()
139
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in ci_stop_smc_clock()
148
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in ci_start_smc_clock()
157
u32 clk =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in ci_is_smc_running()
158
u32 pc_c =
RREG32_SMC
(SMC_PC_C);
in ci_is_smc_running()
176
tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
H
A
D
si_smc.c
115
u32 tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in si_start_smc()
131
tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in si_reset_smc()
145
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in si_stop_smc_clock()
154
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in si_start_smc_clock()
163
u32 rst =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in si_is_smc_running()
164
u32 clk =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in si_is_smc_running()
202
tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in si_wait_for_smc_inactive()
H
A
D
trinity_dpm.c
334
value =
RREG32_SMC
(GFX_POWER_GATING_CNTL);
in trinity_gfx_powergating_initialize()
462
if (
RREG32_SMC
(CC_SMU_TST_EFUSE1_MISC) & RB_BACKEND_DISABLE_MASK)
in trinity_gfx_powergating_enable()
463
WREG32_SMC(SMU_SCRATCH_A, (
RREG32_SMC
(SMU_SCRATCH_A) | 0x01));
in trinity_gfx_powergating_enable()
478
value =
RREG32_SMC
(PM_I_CNTL_1);
in trinity_gfx_dynamic_mgpg_enable()
483
value =
RREG32_SMC
(SMU_S_PG_CNTL);
in trinity_gfx_dynamic_mgpg_enable()
488
value =
RREG32_SMC
(SMU_S_PG_CNTL);
in trinity_gfx_dynamic_mgpg_enable()
492
value =
RREG32_SMC
(PM_I_CNTL_1);
in trinity_gfx_dynamic_mgpg_enable()
552
value =
RREG32_SMC
(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);
in trinity_set_divider_value()
562
value =
RREG32_SMC
(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix);
in trinity_set_divider_value()
574
value =
RREG32_SMC
(SMU_SCLK_DPM_STATE_0_CNTL_
in trinity_set_ds_dividers()
[all...]
H
A
D
ci_dpm.c
559
data =
RREG32_SMC
(config_regs->offset);
in ci_program_pt_config_registers()
861
tmp =
RREG32_SMC
(CG_THERMAL_INT);
in ci_thermal_set_temperature_range()
869
tmp =
RREG32_SMC
(CG_THERMAL_CTRL);
in ci_thermal_set_temperature_range()
884
u32 thermal_int =
RREG32_SMC
(CG_THERMAL_INT);
in ci_thermal_enable_alert()
916
tmp = (
RREG32_SMC
(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK) >> FDO_PWM_MODE_SHIFT;
in ci_fan_ctrl_set_static_mode()
918
tmp = (
RREG32_SMC
(CG_FDO_CTRL2) & TMIN_MASK) >> TMIN_SHIFT;
in ci_fan_ctrl_set_static_mode()
923
tmp =
RREG32_SMC
(CG_FDO_CTRL2) & ~TMIN_MASK;
in ci_fan_ctrl_set_static_mode()
927
tmp =
RREG32_SMC
(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;
in ci_fan_ctrl_set_static_mode()
948
duty100 = (
RREG32_SMC
(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;
in ci_thermal_setup_fan_table()
992
tmp = (
RREG32_SMC
(CG_MULT_THERMAL_CTR
in ci_thermal_setup_fan_table()
[all...]
H
A
D
kv_smc.c
60
*enable_mask =
RREG32_SMC
(SMC_SYSCON_MSG_ARG_0);
in kv_dpm_get_enable_mask()
H
A
D
kv_dpm.c
174
data =
RREG32_SMC
(config_regs->offset);
in kv_program_pt_config_registers()
488
u32 tmp =
RREG32_SMC
(GENERAL_PWRMGT);
in kv_start_dpm()
503
u32 sclk_pwrmgt_cntl =
RREG32_SMC
(SCLK_PWRMGT_CNTL);
in kv_start_am()
513
u32 sclk_pwrmgt_cntl =
RREG32_SMC
(SCLK_PWRMGT_CNTL);
in kv_reset_am()
1019
thermal_int =
RREG32_SMC
(CG_THERMAL_INT_CTRL);
in kv_enable_thermal_int()
2238
nbdpmconfig1 =
RREG32_SMC
(NB_DPM_CONFIG_1);
in kv_program_nbps_index_settings()
2265
tmp =
RREG32_SMC
(CG_THERMAL_INT_CTRL);
in kv_set_thermal_temperature_range()
2603
(
RREG32_SMC
(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_SCLK_INDEX_MASK) >>
in kv_dpm_debugfs_print_current_performance_level()
2612
tmp = (
RREG32_SMC
(SMU_VOLTAGE_STATUS) & SMU_VOLTAGE_CURRENT_LEVEL_MASK) >>
in kv_dpm_debugfs_print_current_performance_level()
2626
(
RREG32_SMC
(TARGET_AND_CURRENT_PROFILE_INDE
in kv_dpm_get_current_sclk()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/
H
A
D
si_smc.c
113
u32 tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in amdgpu_si_start_smc()
129
tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL) |
in amdgpu_si_reset_smc()
143
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in amdgpu_si_smc_clock()
155
u32 rst =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in amdgpu_si_is_smc_running()
156
u32 clk =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in amdgpu_si_is_smc_running()
194
tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in amdgpu_si_wait_for_smc_inactive()
H
A
D
kv_smc.c
63
*enable_mask =
RREG32_SMC
(ixSMC_SYSCON_MSG_ARG_0);
in amdgpu_kv_dpm_get_enable_mask()
H
A
D
kv_dpm.c
426
data =
RREG32_SMC
(config_regs->offset);
in kv_program_pt_config_registers()
727
u32 tmp =
RREG32_SMC
(ixGENERAL_PWRMGT);
in kv_start_dpm()
742
u32 sclk_pwrmgt_cntl =
RREG32_SMC
(ixSCLK_PWRMGT_CNTL);
in kv_start_am()
753
u32 sclk_pwrmgt_cntl =
RREG32_SMC
(ixSCLK_PWRMGT_CNTL);
in kv_reset_am()
2495
nbdpmconfig1 =
RREG32_SMC
(ixNB_DPM_CONFIG_1);
in kv_program_nbps_index_settings()
2524
tmp =
RREG32_SMC
(ixCG_THERMAL_INT_CTRL);
in kv_set_thermal_temperature_range()
2856
(
RREG32_SMC
(ixTARGET_AND_CURRENT_PROFILE_INDEX) &
in kv_dpm_debugfs_print_current_performance_level()
2866
tmp = (
RREG32_SMC
(ixSMU_VOLTAGE_STATUS) &
in kv_dpm_debugfs_print_current_performance_level()
2941
temp =
RREG32_SMC
(0xC0300E0C);
in kv_dpm_get_temp()
3135
cg_thermal_int =
RREG32_SMC
(ixCG_THERMAL_INT_CTR
in kv_dpm_set_interrupt_state()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/legacy-dpm/
H
A
D
si_smc.c
113
u32 tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in amdgpu_si_start_smc()
129
tmp =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL) |
in amdgpu_si_reset_smc()
143
u32 tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in amdgpu_si_smc_clock()
155
u32 rst =
RREG32_SMC
(SMC_SYSCON_RESET_CNTL);
in amdgpu_si_is_smc_running()
156
u32 clk =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in amdgpu_si_is_smc_running()
194
tmp =
RREG32_SMC
(SMC_SYSCON_CLOCK_CNTL_0);
in amdgpu_si_wait_for_smc_inactive()
H
A
D
kv_smc.c
63
*enable_mask =
RREG32_SMC
(ixSMC_SYSCON_MSG_ARG_0);
in amdgpu_kv_dpm_get_enable_mask()
H
A
D
kv_dpm.c
414
data =
RREG32_SMC
(config_regs->offset);
in kv_program_pt_config_registers()
715
u32 tmp =
RREG32_SMC
(ixGENERAL_PWRMGT);
in kv_start_dpm()
730
u32 sclk_pwrmgt_cntl =
RREG32_SMC
(ixSCLK_PWRMGT_CNTL);
in kv_start_am()
741
u32 sclk_pwrmgt_cntl =
RREG32_SMC
(ixSCLK_PWRMGT_CNTL);
in kv_reset_am()
2497
nbdpmconfig1 =
RREG32_SMC
(ixNB_DPM_CONFIG_1);
in kv_program_nbps_index_settings()
2526
tmp =
RREG32_SMC
(ixCG_THERMAL_INT_CTRL);
in kv_set_thermal_temperature_range()
2858
(
RREG32_SMC
(ixTARGET_AND_CURRENT_PROFILE_INDEX) &
in kv_dpm_debugfs_print_current_performance_level()
2868
tmp = (
RREG32_SMC
(ixSMU_VOLTAGE_STATUS) &
in kv_dpm_debugfs_print_current_performance_level()
2943
temp =
RREG32_SMC
(0xC0300E0C);
in kv_dpm_get_temp()
3123
cg_thermal_int =
RREG32_SMC
(ixCG_THERMAL_INT_CTR
in kv_dpm_set_interrupt_state()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H
A
D
vi.c
342
tmp =
RREG32_SMC
(ixCG_CLKPIN_CNTL_2);
in vi_get_xclk()
346
tmp =
RREG32_SMC
(ixCG_CLKPIN_CNTL);
in vi_get_xclk()
397
rom_cntl =
RREG32_SMC
(ixROM_CNTL);
in vi_read_disabled_bios()
790
tmp =
RREG32_SMC
(cntl_reg);
in vi_set_uvd_clock()
801
tmp =
RREG32_SMC
(status_reg);
in vi_set_uvd_clock()
877
if (
RREG32_SMC
(reg_status) & status_mask)
in vi_set_vce_clocks()
885
tmp =
RREG32_SMC
(reg_ctrl);
in vi_set_vce_clocks()
891
if (
RREG32_SMC
(reg_status) & status_mask)
in vi_set_vce_clocks()
954
return (
RREG32_SMC
(ATI_REV_ID_FUSE_MACRO__ADDRESS) & ATI_REV_ID_FUSE_MACRO__MASK)
in vi_get_rev_id()
1069
clock_cntl =
RREG32_SMC
(ixSMC_SYSCON_CLOCK_CNTL_
in vi_need_reset_on_init()
[all...]
H
A
D
cik.c
846
if (
RREG32_SMC
(ixGENERAL_PWRMGT) & GENERAL_PWRMGT__GPU_COUNTER_CLK_MASK)
in cik_get_xclk()
849
if (
RREG32_SMC
(ixCG_CLKPIN_CNTL) & CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK)
in cik_get_xclk()
906
rom_cntl =
RREG32_SMC
(ixROM_CNTL);
in cik_read_disabled_bios()
1399
tmp =
RREG32_SMC
(cntl_reg);
in cik_set_uvd_clock()
1406
if (
RREG32_SMC
(status_reg) & CG_DCLK_STATUS__DCLK_STATUS_MASK)
in cik_set_uvd_clock()
1441
if (
RREG32_SMC
(ixCG_ECLK_STATUS) & CG_ECLK_STATUS__ECLK_STATUS_MASK)
in cik_set_vce_clocks()
1448
tmp =
RREG32_SMC
(ixCG_ECLK_CNTL);
in cik_set_vce_clocks()
1455
if (
RREG32_SMC
(ixCG_ECLK_STATUS) & CG_ECLK_STATUS__ECLK_STATUS_MASK)
in cik_set_vce_clocks()
1741
orig = data =
RREG32_SMC
(ixTHM_CLK_CNTL);
in cik_program_aspm()
1749
orig = data =
RREG32_SMC
(ixMISC_CLK_CTR
in cik_program_aspm()
[all...]
H
A
D
vce_v3_0.c
373
tmp = (
RREG32_SMC
(ixVCE_HARVEST_FUSE_MACRO__ADDRESS) &
in vce_v3_0_get_harvest_config()
377
tmp = (
RREG32_SMC
(ixCC_HARVEST_FUSES) &
in vce_v3_0_get_harvest_config()
815
data =
RREG32_SMC
(ixCURRENT_PG_STATUS_APU);
in vce_v3_0_get_clockgating_state()
817
data =
RREG32_SMC
(ixCURRENT_PG_STATUS);
in vce_v3_0_get_clockgating_state()
H
A
D
uvd_v4_2.c
698
if (!(
RREG32_SMC
(ixCURRENT_PG_STATUS) &
in uvd_v4_2_set_powergating_state()
709
if (
RREG32_SMC
(ixCURRENT_PG_STATUS) &
in uvd_v4_2_set_powergating_state()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H
A
D
vi.c
555
tmp =
RREG32_SMC
(ixCG_CLKPIN_CNTL_2);
in vi_get_xclk()
559
tmp =
RREG32_SMC
(ixCG_CLKPIN_CNTL);
in vi_get_xclk()
605
rom_cntl =
RREG32_SMC
(ixROM_CNTL);
in vi_read_disabled_bios()
994
tmp =
RREG32_SMC
(cntl_reg);
in vi_set_uvd_clock()
1005
tmp =
RREG32_SMC
(status_reg);
in vi_set_uvd_clock()
1081
if (
RREG32_SMC
(reg_status) & status_mask)
in vi_set_vce_clocks()
1089
tmp =
RREG32_SMC
(reg_ctrl);
in vi_set_vce_clocks()
1095
if (
RREG32_SMC
(reg_status) & status_mask)
in vi_set_vce_clocks()
1188
orig = data =
RREG32_SMC
(ixTHM_CLK_CNTL);
in vi_program_aspm()
1195
orig = data =
RREG32_SMC
(ixMISC_CLK_CTR
in vi_program_aspm()
[all...]
H
A
D
cik.c
922
if (
RREG32_SMC
(ixGENERAL_PWRMGT) & GENERAL_PWRMGT__GPU_COUNTER_CLK_MASK)
in cik_get_xclk()
925
if (
RREG32_SMC
(ixCG_CLKPIN_CNTL) & CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK)
in cik_get_xclk()
982
rom_cntl =
RREG32_SMC
(ixROM_CNTL);
in cik_read_disabled_bios()
1464
tmp =
RREG32_SMC
(cntl_reg);
in cik_set_uvd_clock()
1471
if (
RREG32_SMC
(status_reg) & CG_DCLK_STATUS__DCLK_STATUS_MASK)
in cik_set_uvd_clock()
1506
if (
RREG32_SMC
(ixCG_ECLK_STATUS) & CG_ECLK_STATUS__ECLK_STATUS_MASK)
in cik_set_vce_clocks()
1513
tmp =
RREG32_SMC
(ixCG_ECLK_CNTL);
in cik_set_vce_clocks()
1520
if (
RREG32_SMC
(ixCG_ECLK_STATUS) & CG_ECLK_STATUS__ECLK_STATUS_MASK)
in cik_set_vce_clocks()
1806
orig = data =
RREG32_SMC
(ixTHM_CLK_CNTL);
in cik_program_aspm()
1814
orig = data =
RREG32_SMC
(ixMISC_CLK_CTR
in cik_program_aspm()
[all...]
H
A
D
vce_v3_0.c
373
tmp = (
RREG32_SMC
(ixVCE_HARVEST_FUSE_MACRO__ADDRESS) &
in vce_v3_0_get_harvest_config()
377
tmp = (
RREG32_SMC
(ixCC_HARVEST_FUSES) &
in vce_v3_0_get_harvest_config()
842
data =
RREG32_SMC
(ixCURRENT_PG_STATUS_APU);
in vce_v3_0_get_clockgating_state()
844
data =
RREG32_SMC
(ixCURRENT_PG_STATUS);
in vce_v3_0_get_clockgating_state()
Completed in 45 milliseconds
1
2
3