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Searched refs:RREG32_KIQ (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c2454 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_CGTT_MGCG_OVERRIDE)); in gfx_v9_4_3_get_clockgating_state()
2459 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_CGCG_CGLS_CTRL)); in gfx_v9_4_3_get_clockgating_state()
2468 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_MEM_SLP_CNTL)); in gfx_v9_4_3_get_clockgating_state()
2473 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regCP_MEM_SLP_CNTL)); in gfx_v9_4_3_get_clockgating_state()
H A Damdgpu.h1166 #define RREG32_KIQ(reg) amdgpu_kiq_rreg(adev, (reg)) macro
H A Dgfx_v9_0.c5036 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v9_0_get_clockgating_state()
5041 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL)); in gfx_v9_0_get_clockgating_state()
5050 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL)); in gfx_v9_0_get_clockgating_state()
5055 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL)); in gfx_v9_0_get_clockgating_state()
5061 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D)); in gfx_v9_0_get_clockgating_state()
H A Dsdma_v5_2.c1649 data = RREG32_KIQ(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL)); in sdma_v5_2_get_clockgating_state()
H A Dgfx_v10_0.c8096 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v10_0_get_clockgating_state()
8101 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v10_0_get_clockgating_state()
8106 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL)); in gfx_v10_0_get_clockgating_state()
8115 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL)); in gfx_v10_0_get_clockgating_state()
8120 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL)); in gfx_v10_0_get_clockgating_state()
8125 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D)); in gfx_v10_0_get_clockgating_state()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu.h1063 #define RREG32_KIQ(reg) amdgpu_kiq_rreg(adev, (reg)) macro
H A Dgfx_v9_0.c5174 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v9_0_get_clockgating_state()
5179 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL)); in gfx_v9_0_get_clockgating_state()
5188 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL)); in gfx_v9_0_get_clockgating_state()
5193 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL)); in gfx_v9_0_get_clockgating_state()
5199 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D)); in gfx_v9_0_get_clockgating_state()
H A Dsdma_v5_2.c1592 data = RREG32_KIQ(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL)); in sdma_v5_2_get_clockgating_state()
H A Dgfx_v10_0.c7662 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v10_0_get_clockgating_state()
7667 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL)); in gfx_v10_0_get_clockgating_state()
7676 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL)); in gfx_v10_0_get_clockgating_state()
7681 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL)); in gfx_v10_0_get_clockgating_state()
7686 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D)); in gfx_v10_0_get_clockgating_state()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c2280 tmp = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_ALWAYS_ON_WGP_MASK)); in vangogh_post_smu_init()

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