RISCV_RELEASE_BARRIER (reference) in projects: kernel - OpenGrok search results

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Searched refs:RISCV_RELEASE_BARRIER (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-5.10/arch/riscv/include/asm/
H A D	fence.h	`6 #define RISCV_RELEASE_BARRIER "\tfence rw, w\n" macro 9 #define RISCV_RELEASE_BARRIER macro`
H A D	cmpxchg.h	`90 RISCV_RELEASE_BARRIER \ 98 RISCV_RELEASE_BARRIER \ 266 RISCV_RELEASE_BARRIER \ 278 RISCV_RELEASE_BARRIER \`
H A D	spinlock.h	`123 RISCV_RELEASE_BARRIER in arch_read_unlock()`
H A D	atomic.h	`26 __asm__ __volatile__(RISCV_RELEASE_BARRIER "" ::: "memory");`
/kernel/linux/linux-6.6/arch/riscv/include/asm/
H A D	fence.h	`6 #define RISCV_RELEASE_BARRIER "\tfence rw, w\n" macro 9 #define RISCV_RELEASE_BARRIER macro`
H A D	cmpxchg.h	`90 RISCV_RELEASE_BARRIER \ 98 RISCV_RELEASE_BARRIER \ 266 RISCV_RELEASE_BARRIER \ 278 RISCV_RELEASE_BARRIER \`
H A D	atomic.h	`26 __asm__ __volatile__(RISCV_RELEASE_BARRIER "" ::: "memory");`

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