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Searched refs:RESET_CTRL (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/mach-vexpress/
H A Dtc2_pm.c32 #define RESET_CTRL 0x018 macro
120 return !(readl_relaxed(scc + RESET_CTRL) & mask); in tc2_core_in_reset()
134 pr_debug("%s(cpu=%u, cluster=%u): RESET_CTRL = 0x%08X\n", in tc2_pm_wait_for_powerdown()
136 readl_relaxed(scc + RESET_CTRL)); in tc2_pm_wait_for_powerdown()
/kernel/linux/linux-6.6/arch/arm/mach-versatile/
H A Dtc2_pm.c30 #define RESET_CTRL 0x018 macro
118 return !(readl_relaxed(scc + RESET_CTRL) & mask); in tc2_core_in_reset()
132 pr_debug("%s(cpu=%u, cluster=%u): RESET_CTRL = 0x%08X\n", in tc2_pm_wait_for_powerdown()
134 readl_relaxed(scc + RESET_CTRL)); in tc2_pm_wait_for_powerdown()
/kernel/linux/linux-5.10/drivers/i3c/master/
H A Ddw-i3c-master.c89 #define RESET_CTRL 0x34 macro
432 master->regs + RESET_CTRL); in dw_i3c_master_dequeue_xfer_locked()
434 readl_poll_timeout_atomic(master->regs + RESET_CTRL, status, in dw_i3c_master_dequeue_xfer_locked()
/kernel/linux/linux-5.10/drivers/ptp/
H A Didt8a340_reg.h101 #define RESET_CTRL 0xc000 macro
H A Dptp_clockmatrix.c905 err = idtcm_write(idtcm, RESET_CTRL, SM_RESET, &byte, sizeof(byte)); in idtcm_state_machine_reset()
/kernel/linux/linux-6.6/drivers/i3c/master/
H A Ddw-i3c-master.c106 #define RESET_CTRL 0x34 macro
438 master->regs + RESET_CTRL); in dw_i3c_master_dequeue_xfer_locked()
440 readl_poll_timeout_atomic(master->regs + RESET_CTRL, status, in dw_i3c_master_dequeue_xfer_locked()
/kernel/linux/linux-6.6/include/linux/mfd/
H A Didt8a340_reg.h98 #define RESET_CTRL 0xc000 macro
/kernel/linux/linux-6.6/drivers/ptp/
H A Dptp_clockmatrix.c1072 err = idtcm_write(idtcm, RESET_CTRL, in idtcm_state_machine_reset()

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