REG_UPDATE (reference) in projects: kernel

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Searched refs:REG_UPDATE (Results 1 - 25 of 168) sorted by relevance

12 3 4 5 6 7

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A D	dcn20_mmhubbub.c	83 REG_UPDATE(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_SW_LOCK, params->swlock); in mmhubbub2_config_mcif_buf() 86 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y, MCIF_WB_BUF_1_ADDR_Y, MCIF_ADDR(params->luma_address[0])); in mmhubbub2_config_mcif_buf() 87 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[0])); in mmhubbub2_config_mcif_buf() 89 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y_OFFSET, MCIF_WB_BUF_1_ADDR_Y_OFFSET, 0); in mmhubbub2_config_mcif_buf() 92 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, MCIF_ADDR(params->chroma_address[0])); in mmhubbub2_config_mcif_buf() 93 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[0])); in mmhubbub2_config_mcif_buf() 95 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C_OFFSET, MCIF_WB_BUF_1_ADDR_C_OFFSET, 0); in mmhubbub2_config_mcif_buf() 98 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y, MCIF_WB_BUF_2_ADDR_Y, MCIF_ADDR(params->luma_address[1])); in mmhubbub2_config_mcif_buf() 99 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[1])); in mmhubbub2_config_mcif_buf() 101 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y_OFFSE in mmhubbub2_config_mcif_buf() [all...]
H A D	dcn20_dwb.c	83 REG_UPDATE(CNV_MODE, CNV_WINDOW_CROP_EN, 1); in dwb2_config_dwb_cnv() 84 REG_UPDATE(CNV_WINDOW_START, CNV_WINDOW_START_X, params->cnv_params.crop_x); in dwb2_config_dwb_cnv() 85 REG_UPDATE(CNV_WINDOW_START, CNV_WINDOW_START_Y, params->cnv_params.crop_y); in dwb2_config_dwb_cnv() 86 REG_UPDATE(CNV_WINDOW_SIZE, CNV_WINDOW_WIDTH, params->cnv_params.crop_width); in dwb2_config_dwb_cnv() 87 REG_UPDATE(CNV_WINDOW_SIZE, CNV_WINDOW_HEIGHT, params->cnv_params.crop_height); in dwb2_config_dwb_cnv() 89 REG_UPDATE(CNV_MODE, CNV_WINDOW_CROP_EN, 0); in dwb2_config_dwb_cnv() 93 REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_RATE, params->capture_rate); in dwb2_config_dwb_cnv() 96 REG_UPDATE(CNV_MODE, CNV_OUT_BPC, params->cnv_params.cnv_out_bpc); in dwb2_config_dwb_cnv() 118 REG_UPDATE(WB_ENABLE, WB_ENABLE, 1); in dwb2_enable() 127 REG_UPDATE(CNV_MOD in dwb2_enable() [all...]
H A D	dcn20_dpp.c	81 REG_UPDATE(CM_MEM_PWR_CTRL, SHARED_MEM_PWR_DIS, power_on == true ? 1:0); in dpp2_power_on_obuf() 83 REG_UPDATE(OBUF_MEM_PWR_CTRL, in dpp2_power_on_obuf() 86 REG_UPDATE(DSCL_MEM_PWR_CTRL, in dpp2_power_on_obuf() 122 REG_UPDATE(FORMAT_CONTROL, FORMAT_CNV16, 0); in dpp2_cnv_setup() 123 REG_UPDATE(FORMAT_CONTROL, CNVC_BYPASS_MSB_ALIGN, 0); in dpp2_cnv_setup() 124 REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE, 0); in dpp2_cnv_setup() 125 REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE_C, 0); in dpp2_cnv_setup() 215 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0); in dpp2_cnv_setup() 216 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT1, alpha_2bit_lut->lut1); in dpp2_cnv_setup() 217 REG_UPDATE(ALPHA_2BIT_LU in dpp2_cnv_setup() [all...]
H A D	dcn20_stream_encoder.c	83 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL1, in enc2_update_hdmi_info_packet() 90 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL1, in enc2_update_hdmi_info_packet() 97 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, in enc2_update_hdmi_info_packet() 104 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, in enc2_update_hdmi_info_packet() 111 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL3, in enc2_update_hdmi_info_packet() 118 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL3, in enc2_update_hdmi_info_packet() 125 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4, in enc2_update_hdmi_info_packet() 132 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4, in enc2_update_hdmi_info_packet() 151 REG_UPDATE(HDMI_DB_CONTROL, HDMI_DB_DISABLE, 1); in enc2_stream_encoder_update_hdmi_info_packets() 225 REG_UPDATE(DP_SEC_CNTL in enc2_update_gsp7_128_info_packet() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/
H A D	dcn20_mmhubbub.c	83 REG_UPDATE(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_SW_LOCK, params->swlock); in mmhubbub2_config_mcif_buf() 86 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y, MCIF_WB_BUF_1_ADDR_Y, MCIF_ADDR(params->luma_address[0])); in mmhubbub2_config_mcif_buf() 87 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[0])); in mmhubbub2_config_mcif_buf() 89 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y_OFFSET, MCIF_WB_BUF_1_ADDR_Y_OFFSET, 0); in mmhubbub2_config_mcif_buf() 92 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, MCIF_ADDR(params->chroma_address[0])); in mmhubbub2_config_mcif_buf() 93 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[0])); in mmhubbub2_config_mcif_buf() 95 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C_OFFSET, MCIF_WB_BUF_1_ADDR_C_OFFSET, 0); in mmhubbub2_config_mcif_buf() 98 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y, MCIF_WB_BUF_2_ADDR_Y, MCIF_ADDR(params->luma_address[1])); in mmhubbub2_config_mcif_buf() 99 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[1])); in mmhubbub2_config_mcif_buf() 101 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y_OFFSE in mmhubbub2_config_mcif_buf() [all...]
H A D	dcn20_dwb.c	83 REG_UPDATE(CNV_MODE, CNV_WINDOW_CROP_EN, 1); in dwb2_config_dwb_cnv() 84 REG_UPDATE(CNV_WINDOW_START, CNV_WINDOW_START_X, params->cnv_params.crop_x); in dwb2_config_dwb_cnv() 85 REG_UPDATE(CNV_WINDOW_START, CNV_WINDOW_START_Y, params->cnv_params.crop_y); in dwb2_config_dwb_cnv() 86 REG_UPDATE(CNV_WINDOW_SIZE, CNV_WINDOW_WIDTH, params->cnv_params.crop_width); in dwb2_config_dwb_cnv() 87 REG_UPDATE(CNV_WINDOW_SIZE, CNV_WINDOW_HEIGHT, params->cnv_params.crop_height); in dwb2_config_dwb_cnv() 89 REG_UPDATE(CNV_MODE, CNV_WINDOW_CROP_EN, 0); in dwb2_config_dwb_cnv() 93 REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_RATE, params->capture_rate); in dwb2_config_dwb_cnv() 96 REG_UPDATE(CNV_MODE, CNV_OUT_BPC, params->cnv_params.cnv_out_bpc); in dwb2_config_dwb_cnv() 118 REG_UPDATE(WB_ENABLE, WB_ENABLE, 1); in dwb2_enable() 127 REG_UPDATE(CNV_MOD in dwb2_enable() [all...]
H A D	dcn20_stream_encoder.c	84 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL1, in enc2_update_hdmi_info_packet() 91 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL1, in enc2_update_hdmi_info_packet() 98 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, in enc2_update_hdmi_info_packet() 105 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, in enc2_update_hdmi_info_packet() 112 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL3, in enc2_update_hdmi_info_packet() 119 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL3, in enc2_update_hdmi_info_packet() 126 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4, in enc2_update_hdmi_info_packet() 133 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4, in enc2_update_hdmi_info_packet() 152 REG_UPDATE(HDMI_DB_CONTROL, HDMI_DB_DISABLE, 1); in enc2_stream_encoder_update_hdmi_info_packets() 228 REG_UPDATE(DP_SEC_CNTL in enc2_update_gsp7_128_info_packet() [all...]
H A D	dcn20_dpp.c	81 REG_UPDATE(CM_MEM_PWR_CTRL, SHARED_MEM_PWR_DIS, power_on == true ? 1:0); in dpp2_power_on_obuf() 83 REG_UPDATE(OBUF_MEM_PWR_CTRL, in dpp2_power_on_obuf() 86 REG_UPDATE(DSCL_MEM_PWR_CTRL, in dpp2_power_on_obuf() 122 REG_UPDATE(FORMAT_CONTROL, FORMAT_CNV16, 0); in dpp2_cnv_setup() 123 REG_UPDATE(FORMAT_CONTROL, CNVC_BYPASS_MSB_ALIGN, 0); in dpp2_cnv_setup() 124 REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE, 0); in dpp2_cnv_setup() 125 REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE_C, 0); in dpp2_cnv_setup() 219 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0); in dpp2_cnv_setup() 220 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT1, alpha_2bit_lut->lut1); in dpp2_cnv_setup() 221 REG_UPDATE(ALPHA_2BIT_LU in dpp2_cnv_setup() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/
H A D	dcn30_vpg.c	79 REG_UPDATE(VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_CLR, 1); in vpg3_update_generic_info_packet() 82 REG_UPDATE(VPG_GENERIC_PACKET_ACCESS_CTRL, in vpg3_update_generic_info_packet() 113 REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL, in vpg3_update_generic_info_packet() 117 REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL, in vpg3_update_generic_info_packet() 121 REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL, in vpg3_update_generic_info_packet() 125 REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL, in vpg3_update_generic_info_packet() 129 REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL, in vpg3_update_generic_info_packet() 133 REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL, in vpg3_update_generic_info_packet() 137 REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL, in vpg3_update_generic_info_packet() 141 REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTR in vpg3_update_generic_info_packet() [all...]
H A D	dcn30_mmhubbub.c	97 REG_UPDATE(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_ACK, 1); in mmhubbub3_warmup_mcif() 100 REG_UPDATE(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_EN, false); in mmhubbub3_warmup_mcif() 110 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y, MCIF_WB_BUF_1_ADDR_Y, MCIF_ADDR(params->luma_address[0])); in mmhubbub3_config_mcif_buf() 111 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[0])); in mmhubbub3_config_mcif_buf() 114 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, MCIF_ADDR(params->chroma_address[0])); in mmhubbub3_config_mcif_buf() 115 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[0])); in mmhubbub3_config_mcif_buf() 118 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y, MCIF_WB_BUF_2_ADDR_Y, MCIF_ADDR(params->luma_address[1])); in mmhubbub3_config_mcif_buf() 119 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[1])); in mmhubbub3_config_mcif_buf() 122 REG_UPDATE(MCIF_WB_BUF_2_ADDR_C, MCIF_WB_BUF_2_ADDR_C, MCIF_ADDR(params->chroma_address[1])); in mmhubbub3_config_mcif_buf() 123 REG_UPDATE(MCIF_WB_BUF_2_ADDR_C_HIG in mmhubbub3_config_mcif_buf() [all...]
H A D	dcn30_dio_stream_encoder.c	88 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL1, in enc3_update_hdmi_info_packet() 95 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL1, in enc3_update_hdmi_info_packet() 102 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, in enc3_update_hdmi_info_packet() 109 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, in enc3_update_hdmi_info_packet() 116 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL3, in enc3_update_hdmi_info_packet() 123 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL3, in enc3_update_hdmi_info_packet() 130 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4, in enc3_update_hdmi_info_packet() 137 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4, in enc3_update_hdmi_info_packet() 144 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL7, in enc3_update_hdmi_info_packet() 151 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL in enc3_update_hdmi_info_packet() [all...]
H A D	dcn30_dwb.c	76 REG_UPDATE(FC_MODE_CTRL, FC_WINDOW_CROP_EN, 1); in dwb3_config_fc() 77 REG_UPDATE(FC_WINDOW_START, FC_WINDOW_START_X, params->cnv_params.crop_x); in dwb3_config_fc() 78 REG_UPDATE(FC_WINDOW_START, FC_WINDOW_START_Y, params->cnv_params.crop_y); in dwb3_config_fc() 79 REG_UPDATE(FC_WINDOW_SIZE, FC_WINDOW_WIDTH, params->cnv_params.crop_width); in dwb3_config_fc() 80 REG_UPDATE(FC_WINDOW_SIZE, FC_WINDOW_HEIGHT, params->cnv_params.crop_height); in dwb3_config_fc() 82 REG_UPDATE(FC_MODE_CTRL, FC_WINDOW_CROP_EN, 0); in dwb3_config_fc() 86 REG_UPDATE(FC_MODE_CTRL, FC_FRAME_CAPTURE_RATE, params->capture_rate); in dwb3_config_fc() 97 REG_UPDATE(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, 1); in dwb3_enable() 111 REG_UPDATE(FC_MODE_CTRL, FC_FRAME_CAPTURE_EN, DWB_FRAME_CAPTURE_ENABLE); in dwb3_enable() 114 REG_UPDATE(FC_FLOW_CTR in dwb3_enable() [all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
H A D	dcn30_mmhubbub.c	97 REG_UPDATE(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_ACK, 1); in mmhubbub3_warmup_mcif() 100 REG_UPDATE(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_EN, false); in mmhubbub3_warmup_mcif() 110 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y, MCIF_WB_BUF_1_ADDR_Y, MCIF_ADDR(params->luma_address[0])); in mmhubbub3_config_mcif_buf() 111 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[0])); in mmhubbub3_config_mcif_buf() 114 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, MCIF_ADDR(params->chroma_address[0])); in mmhubbub3_config_mcif_buf() 115 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[0])); in mmhubbub3_config_mcif_buf() 118 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y, MCIF_WB_BUF_2_ADDR_Y, MCIF_ADDR(params->luma_address[1])); in mmhubbub3_config_mcif_buf() 119 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[1])); in mmhubbub3_config_mcif_buf() 122 REG_UPDATE(MCIF_WB_BUF_2_ADDR_C, MCIF_WB_BUF_2_ADDR_C, MCIF_ADDR(params->chroma_address[1])); in mmhubbub3_config_mcif_buf() 123 REG_UPDATE(MCIF_WB_BUF_2_ADDR_C_HIG in mmhubbub3_config_mcif_buf() [all...]
H A D	dcn30_vpg.c	78 REG_UPDATE(VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_CLR, 1); in vpg3_update_generic_info_packet() 81 REG_UPDATE(VPG_GENERIC_PACKET_ACCESS_CTRL, in vpg3_update_generic_info_packet() 111 REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, in vpg3_update_generic_info_packet() 115 REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, in vpg3_update_generic_info_packet() 119 REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, in vpg3_update_generic_info_packet() 123 REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, in vpg3_update_generic_info_packet() 127 REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, in vpg3_update_generic_info_packet() 131 REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, in vpg3_update_generic_info_packet() 135 REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, in vpg3_update_generic_info_packet() 139 REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTR in vpg3_update_generic_info_packet() [all...]
H A D	dcn30_dwb.c	76 REG_UPDATE(FC_MODE_CTRL, FC_WINDOW_CROP_EN, 1); in dwb3_config_fc() 77 REG_UPDATE(FC_WINDOW_START, FC_WINDOW_START_X, params->cnv_params.crop_x); in dwb3_config_fc() 78 REG_UPDATE(FC_WINDOW_START, FC_WINDOW_START_Y, params->cnv_params.crop_y); in dwb3_config_fc() 79 REG_UPDATE(FC_WINDOW_SIZE, FC_WINDOW_WIDTH, params->cnv_params.crop_width); in dwb3_config_fc() 80 REG_UPDATE(FC_WINDOW_SIZE, FC_WINDOW_HEIGHT, params->cnv_params.crop_height); in dwb3_config_fc() 82 REG_UPDATE(FC_MODE_CTRL, FC_WINDOW_CROP_EN, 0); in dwb3_config_fc() 86 REG_UPDATE(FC_MODE_CTRL, FC_FRAME_CAPTURE_RATE, params->capture_rate); in dwb3_config_fc() 97 REG_UPDATE(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, 1); in dwb3_enable() 111 REG_UPDATE(FC_MODE_CTRL, FC_FRAME_CAPTURE_EN, DWB_FRAME_CAPTURE_ENABLE); in dwb3_enable() 114 REG_UPDATE(FC_FLOW_CTR in dwb3_enable() [all...]
H A D	dcn30_dio_stream_encoder.c	103 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL1, in enc3_update_hdmi_info_packet() 110 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL1, in enc3_update_hdmi_info_packet() 117 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, in enc3_update_hdmi_info_packet() 124 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, in enc3_update_hdmi_info_packet() 131 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL3, in enc3_update_hdmi_info_packet() 138 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL3, in enc3_update_hdmi_info_packet() 145 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4, in enc3_update_hdmi_info_packet() 152 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4, in enc3_update_hdmi_info_packet() 159 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL7, in enc3_update_hdmi_info_packet() 166 REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL in enc3_update_hdmi_info_packet() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/
H A D	dcn32_mmhubbub.c	97 REG_UPDATE(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_ACK, 1); in mmhubbub32_warmup_mcif() 100 REG_UPDATE(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_EN, false); in mmhubbub32_warmup_mcif() 110 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y, MCIF_WB_BUF_1_ADDR_Y, MCIF_ADDR(params->luma_address[0])); in mmhubbub32_config_mcif_buf() 111 REG_UPDATE(MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_WB_BUF_1_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[0])); in mmhubbub32_config_mcif_buf() 114 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C, MCIF_WB_BUF_1_ADDR_C, MCIF_ADDR(params->chroma_address[0])); in mmhubbub32_config_mcif_buf() 115 REG_UPDATE(MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_WB_BUF_1_ADDR_C_HIGH, MCIF_ADDR_HIGH(params->chroma_address[0])); in mmhubbub32_config_mcif_buf() 118 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y, MCIF_WB_BUF_2_ADDR_Y, MCIF_ADDR(params->luma_address[1])); in mmhubbub32_config_mcif_buf() 119 REG_UPDATE(MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_WB_BUF_2_ADDR_Y_HIGH, MCIF_ADDR_HIGH(params->luma_address[1])); in mmhubbub32_config_mcif_buf() 122 REG_UPDATE(MCIF_WB_BUF_2_ADDR_C, MCIF_WB_BUF_2_ADDR_C, MCIF_ADDR(params->chroma_address[1])); in mmhubbub32_config_mcif_buf() 123 REG_UPDATE(MCIF_WB_BUF_2_ADDR_C_HIG in mmhubbub32_config_mcif_buf() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/
H A D	dce_stream_encoder.c	74 REG_UPDATE(AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, 1); in dce110_update_generic_info_packet() 94 REG_UPDATE(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, 1); in dce110_update_generic_info_packet() 99 REG_UPDATE(AFMT_VBI_PACKET_CONTROL, in dce110_update_generic_info_packet() 140 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 144 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 148 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 152 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 156 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 160 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 164 REG_UPDATE(AFMT_VBI_PACKET_CONTROL in dce110_update_generic_info_packet() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/
H A D	dcn31_hpo_dp_stream_encoder.c	66 REG_UPDATE(DP_STREAM_ENC_CLOCK_CONTROL, in dcn31_hpo_dp_stream_enc_enable_stream() 70 REG_UPDATE(DP_SYM32_ENC_CONTROL, in dcn31_hpo_dp_stream_enc_enable_stream() 78 REG_UPDATE(DP_SYM32_ENC_CONTROL, in dcn31_hpo_dp_stream_enc_enable_stream() 86 REG_UPDATE(DP_SYM32_ENC_CONTROL, in dcn31_hpo_dp_stream_enc_enable_stream() 97 REG_UPDATE(DP_STREAM_ENC_INPUT_MUX_CONTROL, in dcn31_hpo_dp_stream_enc_dp_unblank() 101 REG_UPDATE(DP_SYM32_ENC_VID_STREAM_CONTROL, in dcn31_hpo_dp_stream_enc_dp_unblank() 105 REG_UPDATE(DP_SYM32_ENC_VID_FIFO_CONTROL, in dcn31_hpo_dp_stream_enc_dp_unblank() 110 REG_UPDATE(DP_SYM32_ENC_VID_FIFO_CONTROL, in dcn31_hpo_dp_stream_enc_dp_unblank() 115 REG_UPDATE(DP_SYM32_ENC_VID_FIFO_CONTROL, in dcn31_hpo_dp_stream_enc_dp_unblank() 119 REG_UPDATE(DP_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL in dcn31_hpo_dp_stream_enc_dp_unblank() [all...]
H A D	dcn31_dccg.c	74 REG_UPDATE(DPPCLK_DTO_CTRL, in dccg31_update_dpp_dto() 77 REG_UPDATE(DPPCLK_DTO_CTRL, in dccg31_update_dpp_dto() 104 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_enable_dpstreamclk() 108 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_enable_dpstreamclk() 112 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_enable_dpstreamclk() 116 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_enable_dpstreamclk() 140 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_disable_dpstreamclk() 144 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_disable_dpstreamclk() 148 REG_UPDATE(DPSTREAMCLK_CNTL, in dccg31_disable_dpstreamclk() 152 REG_UPDATE(DPSTREAMCLK_CNT in dccg31_disable_dpstreamclk() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/
H A D	dcn10_stream_encoder.c	68 REG_UPDATE(AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, 1); in enc1_update_generic_info_packet() 87 REG_UPDATE(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, 1); in enc1_update_generic_info_packet() 90 REG_UPDATE(AFMT_VBI_PACKET_CONTROL, in enc1_update_generic_info_packet() 122 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 126 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 130 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 134 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 138 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 142 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 146 REG_UPDATE(AFMT_VBI_PACKET_CONTROL in enc1_update_generic_info_packet() [all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
H A D	dcn10_stream_encoder.c	68 REG_UPDATE(AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, 1); in enc1_update_generic_info_packet() 87 REG_UPDATE(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, 1); in enc1_update_generic_info_packet() 91 REG_UPDATE(AFMT_VBI_PACKET_CONTROL, in enc1_update_generic_info_packet() 123 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 127 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 131 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 135 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 139 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 143 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in enc1_update_generic_info_packet() 147 REG_UPDATE(AFMT_VBI_PACKET_CONTROL in enc1_update_generic_info_packet() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn302/
H A D	dcn302_hwseq.c	57 REG_UPDATE(DOMAIN1_PG_CONFIG, in dcn302_dpp_pg_control() 65 REG_UPDATE(DOMAIN3_PG_CONFIG, in dcn302_dpp_pg_control() 73 REG_UPDATE(DOMAIN5_PG_CONFIG, in dcn302_dpp_pg_control() 81 REG_UPDATE(DOMAIN7_PG_CONFIG, in dcn302_dpp_pg_control() 89 REG_UPDATE(DOMAIN9_PG_CONFIG, in dcn302_dpp_pg_control() 114 REG_UPDATE(DOMAIN0_PG_CONFIG, in dcn302_hubp_pg_control() 122 REG_UPDATE(DOMAIN2_PG_CONFIG, in dcn302_hubp_pg_control() 130 REG_UPDATE(DOMAIN4_PG_CONFIG, in dcn302_hubp_pg_control() 138 REG_UPDATE(DOMAIN6_PG_CONFIG, in dcn302_hubp_pg_control() 146 REG_UPDATE(DOMAIN8_PG_CONFI in dcn302_hubp_pg_control() [all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
H A D	dce_stream_encoder.c	78 REG_UPDATE(AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, 1); in dce110_update_generic_info_packet() 98 REG_UPDATE(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, 1); in dce110_update_generic_info_packet() 103 REG_UPDATE(AFMT_VBI_PACKET_CONTROL, in dce110_update_generic_info_packet() 144 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 148 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 152 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 156 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 160 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 164 REG_UPDATE(AFMT_VBI_PACKET_CONTROL1, in dce110_update_generic_info_packet() 168 REG_UPDATE(AFMT_VBI_PACKET_CONTROL in dce110_update_generic_info_packet() [all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/
H A D	hw_gpio.c	54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers() 55 REG_UPDATE(A_reg, A, gpio->store.a); in restore_registers() 56 REG_UPDATE(EN_reg, EN, gpio->store.en); in restore_registers() 107 REG_UPDATE(A_reg, A, value); in dal_hw_gpio_set_value() 114 REG_UPDATE(EN_reg, EN, ~value); in dal_hw_gpio_set_value() 151 REG_UPDATE(EN_reg, EN, 0); in dal_hw_gpio_config_mode() 152 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode() 157 REG_UPDATE(A_reg, A, 0); in dal_hw_gpio_config_mode() 158 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode() 163 REG_UPDATE(A_re in dal_hw_gpio_config_mode() [all...]

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