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Searched refs:REG_MHL_PLL_CTL0 (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
H A Dsil-sii8620.c974 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_set_auto_zone()
981 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_set_auto_zone()
1253 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_mhl_discover()
1529 REG_MHL_PLL_CTL0, 0x07, in sii8620_disconnect()
1535 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_disconnect()
H A Dsil-sii8620.h749 #define REG_MHL_PLL_CTL0 0x0337 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/
H A Dsil-sii8620.c974 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_set_auto_zone()
981 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_set_auto_zone()
1253 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_mhl_discover()
1529 REG_MHL_PLL_CTL0, 0x07, in sii8620_disconnect()
1535 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_disconnect()
H A Dsil-sii8620.h749 #define REG_MHL_PLL_CTL0 0x0337 macro

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