REG_GET_FIELD (reference) in projects: kernel

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Searched refs:REG_GET_FIELD (Results 1 - 25 of 132) sorted by relevance

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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/
H A D	kfd_int_process_v11.c	155 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE), in print_sq_intr_info_auto() 156 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, WLT), in print_sq_intr_info_auto() 157 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE_BUF_FULL), in print_sq_intr_info_auto() 158 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, REG_TIMESTAMP), in print_sq_intr_info_auto() 159 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, CMD_TIMESTAMP), in print_sq_intr_info_auto() 160 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, HOST_CMD_OVERFLOW), in print_sq_intr_info_auto() 161 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, HOST_REG_OVERFLOW), in print_sq_intr_info_auto() 162 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, IMMED_OVERFLOW), in print_sq_intr_info_auto() 163 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE_UTC_ERROR)); in print_sq_intr_info_auto() 170 REG_GET_FIELD(context_id in print_sq_intr_info_inst() [all...]
H A D	kfd_int_process_v10.c	267 encoding = REG_GET_FIELD(context_id1, in event_interrupt_wq_v10() 273 REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_AUTO_CTXID1, in event_interrupt_wq_v10() 275 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 277 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 279 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 281 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 283 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, in event_interrupt_wq_v10() 288 REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1, in event_interrupt_wq_v10() 290 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, in event_interrupt_wq_v10() 292 REG_GET_FIELD(context_id in event_interrupt_wq_v10() [all...]
H A D	kfd_int_process_v9.c	333 encoding = REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, ENCODING); in event_interrupt_wq_v9() 338 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, SE_ID), in event_interrupt_wq_v9() 339 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, THREAD_TRACE), in event_interrupt_wq_v9() 340 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, WLT), in event_interrupt_wq_v9() 341 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, THREAD_TRACE_BUF_FULL), in event_interrupt_wq_v9() 342 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, REG_TIMESTAMP), in event_interrupt_wq_v9() 343 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, CMD_TIMESTAMP), in event_interrupt_wq_v9() 344 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, HOST_CMD_OVERFLOW), in event_interrupt_wq_v9() 345 REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, HOST_REG_OVERFLOW), in event_interrupt_wq_v9() 346 REG_GET_FIELD(context_id in event_interrupt_wq_v9() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A D	umc_v6_7.c	66 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1) in umc_v6_7_query_error_status_helper() 110 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v6_7_ecc_info_query_correctable_error_count() 111 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) { in umc_v6_7_ecc_info_query_correctable_error_count() 122 err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr); in umc_v6_7_ecc_info_query_correctable_error_count() 151 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 152 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 \|\| in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 153 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 \|\| in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 154 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 \|\| in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 155 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 \|\| in umc_v6_7_ecc_info_querry_uncorrectable_error_count() 156 REG_GET_FIELD(mc_umc_statu in umc_v6_7_ecc_info_querry_uncorrectable_error_count() [all...]
H A D	umc_v8_7.c	64 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_7_ecc_info_query_correctable_error_count() 65 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v8_7_ecc_info_query_correctable_error_count() 81 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 82 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 \|\| in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 83 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 \|\| in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 84 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 \|\| in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 85 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 \|\| in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 86 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) in umc_v8_7_ecc_info_querry_uncorrectable_error_count() 149 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_7_ecc_info_query_error_address() 150 REG_GET_FIELD(mc_umc_statu in umc_v8_7_ecc_info_query_error_address() [all...]
H A D	umc_v8_10.c	118 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_10_query_correctable_error_count() 119 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v8_10_query_correctable_error_count() 134 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v8_10_query_uncorrectable_error_count() 135 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 \|\| in umc_v8_10_query_uncorrectable_error_count() 136 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 \|\| in umc_v8_10_query_uncorrectable_error_count() 137 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 \|\| in umc_v8_10_query_uncorrectable_error_count() 138 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 \|\| in umc_v8_10_query_uncorrectable_error_count() 139 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) in umc_v8_10_query_uncorrectable_error_count() 222 addr_lsb = REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, AddrLsb); in umc_v8_10_convert_error_address() 269 if (REG_GET_FIELD(mc_umc_statu in umc_v8_10_query_error_address() [all...]
H A D	umc_v6_1.c	82 return REG_GET_FIELD(rsmu_umc_val, in umc_v6_1_get_umc_index_mode_state() 204 (REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) - in umc_v6_1_query_correctable_error_count() 214 (REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) - in umc_v6_1_query_correctable_error_count() 220 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 && in umc_v6_1_query_correctable_error_count() 221 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v6_1_query_correctable_error_count() 222 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v6_1_query_correctable_error_count() 245 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v6_1_querry_uncorrectable_error_count() 246 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 \|\| in umc_v6_1_querry_uncorrectable_error_count() 247 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 \|\| in umc_v6_1_querry_uncorrectable_error_count() 248 REG_GET_FIELD(mc_umc_statu in umc_v6_1_querry_uncorrectable_error_count() [all...]
H A D	amdgpu_mca.c	36 if (REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in amdgpu_mca_query_correctable_error_count() 37 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in amdgpu_mca_query_correctable_error_count() 47 if ((REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in amdgpu_mca_query_uncorrectable_error_count() 48 (REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 \|\| in amdgpu_mca_query_uncorrectable_error_count() 49 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 \|\| in amdgpu_mca_query_uncorrectable_error_count() 50 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 \|\| in amdgpu_mca_query_uncorrectable_error_count() 51 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 \|\| in amdgpu_mca_query_uncorrectable_error_count() 52 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) in amdgpu_mca_query_uncorrectable_error_count()
H A D	gfxhub_v1_1.c	`54 seg_size = REG_GET_FIELD( in gfxhub_v1_1_get_xgmi_info() 58 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE, PF_MAX_REGION); in gfxhub_v1_1_get_xgmi_info() 61 seg_size = REG_GET_FIELD( in gfxhub_v1_1_get_xgmi_info() 65 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION); in gfxhub_v1_1_get_xgmi_info() 96 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE, in gfxhub_v1_1_get_xgmi_info() 100 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, in gfxhub_v1_1_get_xgmi_info()`
H A D	df_v4_3.c	`39 v0 = REG_GET_FIELD(hw_assert_msklo, in df_v4_3_query_ras_poison_mode() 41 v1 = REG_GET_FIELD(hw_assert_msklo, in df_v4_3_query_ras_poison_mode() 43 v28 = REG_GET_FIELD(hw_assert_mskhi, in df_v4_3_query_ras_poison_mode() 45 v31 = REG_GET_FIELD(hw_assert_mskhi, in df_v4_3_query_ras_poison_mode()`
H A D	smu_v11_0_i2c.c	90 if (REG_GET_FIELD(en_stat, CKSVII2C_IC_ENABLE_STATUS, IC_EN)) in smu_v11_0_i2c_enable() 189 } while (REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFE) == 0); in smu_v11_0_i2c_poll_tx_status() 197 if (REG_GET_FIELD(reg, CKSVII2C_IC_INTR_STAT, R_TX_ABRT) == 1) { in smu_v11_0_i2c_poll_tx_status() 202 if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_tx_status() 208 } else if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_tx_status() 233 if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_rx_status() 251 } while (REG_GET_FIELD(reg_ic_status, CKSVII2C_IC_STATUS, RFNE) == 0); in smu_v11_0_i2c_poll_rx_status() 299 if (!REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFNF)) { in smu_v11_0_i2c_transmit() 423 data[bytes_received] = REG_GET_FIELD(reg, CKSVII2C_IC_DATA_CMD, DAT); in smu_v11_0_i2c_receive() 470 if ((REG_GET_FIELD(reg_ic_enabl in smu_v11_0_i2c_activity_done() [all...]
H A D	gfx_v11_0_3.c	`53 if (REG_GET_FIELD(rlc_status0, RLC_RLCS_FED_STATUS_0, SDMA0_FED_ERR) \|\| in gfx_v11_0_3_rlc_gc_fed_irq() 54 REG_GET_FIELD(rlc_status0, RLC_RLCS_FED_STATUS_0, SDMA1_FED_ERR)) in gfx_v11_0_3_rlc_gc_fed_irq() 92 if (REG_GET_FIELD(rlc_status0, RLC_RLCS_FED_STATUS_0, SDMA0_FED_ERR) \|\| in gfx_v11_0_3_poison_consumption_handler() 93 REG_GET_FIELD(rlc_status0, RLC_RLCS_FED_STATUS_0, SDMA1_FED_ERR)) { in gfx_v11_0_3_poison_consumption_handler()`
H A D	smuio_v13_0_3.c	`43 die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID); in smuio_v13_0_3_get_die_id() 60 socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID); in smuio_v13_0_3_get_socket_id() 79 data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, PKG_TYPE); in smuio_v13_0_3_get_pkg_type()`
H A D	smuio_v13_0.c	`86 die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID); in smuio_v13_0_get_die_id() 103 socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID); in smuio_v13_0_get_socket_id() 120 data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, TOPOLOGY_ID); in smuio_v13_0_is_host_gpu_xgmi_supported()`
H A D	gmc_v7_0.c	95 if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { in gmc_v7_0_mc_stop() 196 running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN); in gmc_v7_0_mc_load_microcode() 219 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v7_0_mc_load_microcode() 225 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v7_0_mc_load_microcode() 326 if (REG_GET_FIELD(tmp, MC_ARB_RAMCFG, CHANSIZE)) in gmc_v7_0_mc_init() 332 switch (REG_GET_FIELD(tmp, MC_SHARED_CHMAP, NOOFCHAN)) { in gmc_v7_0_mc_init() 765 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); in gmc_v7_0_vm_decode_fault() 766 u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v7_0_vm_decode_fault() 772 mc_id = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v7_0_vm_decode_fault() 777 REG_GET_FIELD(statu in gmc_v7_0_vm_decode_fault() [all...]
H A D	mmhub_v3_0_1.c	`102 cid = REG_GET_FIELD(status, in mmhub_v3_0_1_print_l2_protection_fault_status() 104 rw = REG_GET_FIELD(status, in mmhub_v3_0_1_print_l2_protection_fault_status() 123 REG_GET_FIELD(status, in mmhub_v3_0_1_print_l2_protection_fault_status() 126 REG_GET_FIELD(status, in mmhub_v3_0_1_print_l2_protection_fault_status() 129 REG_GET_FIELD(status, in mmhub_v3_0_1_print_l2_protection_fault_status() 132 REG_GET_FIELD(status, in mmhub_v3_0_1_print_l2_protection_fault_status()`
H A D	mmhub_v3_0_2.c	`102 cid = REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 104 rw = REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 115 REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 118 REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 121 REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status() 124 REG_GET_FIELD(status, in mmhub_v3_0_2_print_l2_protection_fault_status()`
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A D	umc_v8_7.c	128 (REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_GeccErrCnt, GeccErrCnt) - in umc_v8_7_query_correctable_error_count() 138 (REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_GeccErrCnt, GeccErrCnt) - in umc_v8_7_query_correctable_error_count() 144 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 && in umc_v8_7_query_correctable_error_count() 145 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_7_query_correctable_error_count() 146 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v8_7_query_correctable_error_count() 161 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v8_7_querry_uncorrectable_error_count() 162 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 \|\| in umc_v8_7_querry_uncorrectable_error_count() 163 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 \|\| in umc_v8_7_querry_uncorrectable_error_count() 164 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 \|\| in umc_v8_7_querry_uncorrectable_error_count() 165 REG_GET_FIELD(mc_umc_statu in umc_v8_7_querry_uncorrectable_error_count() [all...]
H A D	umc_v6_1.c	81 return REG_GET_FIELD(rsmu_umc_val, in umc_v6_1_get_umc_index_mode_state() 203 (REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) - in umc_v6_1_query_correctable_error_count() 213 (REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) - in umc_v6_1_query_correctable_error_count() 219 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 && in umc_v6_1_query_correctable_error_count() 220 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v6_1_query_correctable_error_count() 221 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v6_1_query_correctable_error_count() 244 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v6_1_querry_uncorrectable_error_count() 245 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 \|\| in umc_v6_1_querry_uncorrectable_error_count() 246 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 \|\| in umc_v6_1_querry_uncorrectable_error_count() 247 REG_GET_FIELD(mc_umc_statu in umc_v6_1_querry_uncorrectable_error_count() [all...]
H A D	smu_v11_0_i2c.c	142 } while (REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFE) == 0); in smu_v11_0_i2c_poll_tx_status() 150 if (REG_GET_FIELD(reg, CKSVII2C_IC_INTR_STAT, R_TX_ABRT) == 1) { in smu_v11_0_i2c_poll_tx_status() 155 if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_tx_status() 161 } else if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_tx_status() 185 if (REG_GET_FIELD(reg_c_tx_abrt_source, in smu_v11_0_i2c_poll_rx_status() 203 } while (REG_GET_FIELD(reg_ic_status, CKSVII2C_IC_STATUS, RFNE) == 0); in smu_v11_0_i2c_poll_rx_status() 253 if (REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFNF)) { in smu_v11_0_i2c_transmit() 280 } while (numbytes && REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFNF)); in smu_v11_0_i2c_transmit() 379 data[bytes_received] = REG_GET_FIELD(reg, CKSVII2C_IC_DATA_CMD, DAT); in smu_v11_0_i2c_receive() 426 if ((REG_GET_FIELD(reg_ic_enabl in smu_v11_0_i2c_activity_done() [all...]
H A D	gfxhub_v1_1.c	`36 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION); in gfxhub_v1_1_get_xgmi_info() 60 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_LFB_REGION); in gfxhub_v1_1_get_xgmi_info() 63 adev->gmc.xgmi.node_segment_size = REG_GET_FIELD( in gfxhub_v1_1_get_xgmi_info()`
H A D	gfxhub_v2_1.c	79 u32 cid = REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 89 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 92 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 95 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 98 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 101 REG_GET_FIELD(status, in gfxhub_v2_1_print_l2_protection_fault_status() 503 REG_GET_FIELD(xgmi_lfb_cntl, GCMC_VM_XGMI_LFB_CNTL, PF_MAX_REGION); in gfxhub_v2_1_get_xgmi_info() 523 REG_GET_FIELD(xgmi_lfb_cntl, GCMC_VM_XGMI_LFB_CNTL, PF_LFB_REGION); in gfxhub_v2_1_get_xgmi_info() 527 adev->gmc.xgmi.node_segment_size = REG_GET_FIELD( in gfxhub_v2_1_get_xgmi_info()
H A D	gmc_v7_0.c	97 if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { in gmc_v7_0_mc_stop() 203 running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN); in gmc_v7_0_mc_load_microcode() 226 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v7_0_mc_load_microcode() 232 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v7_0_mc_load_microcode() 333 if (REG_GET_FIELD(tmp, MC_ARB_RAMCFG, CHANSIZE)) { in gmc_v7_0_mc_init() 339 switch (REG_GET_FIELD(tmp, MC_SHARED_CHMAP, NOOFCHAN)) { in gmc_v7_0_mc_init() 772 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); in gmc_v7_0_vm_decode_fault() 773 u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v7_0_vm_decode_fault() 779 mc_id = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, in gmc_v7_0_vm_decode_fault() 784 REG_GET_FIELD(statu in gmc_v7_0_vm_decode_fault() [all...]
H A D	gfxhub_v2_0.c	`79 u32 cid = REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 89 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 92 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 95 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 98 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status() 101 REG_GET_FIELD(status, in gfxhub_v2_0_print_l2_protection_fault_status()`
H A D	nbio_v7_4.c	308 if (REG_GET_FIELD(bif_doorbell_intr_cntl, in nbio_v7_4_handle_ras_controller_intr_no_bifring() 357 if (REG_GET_FIELD(bif_doorbell_intr_cntl, in nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring() 497 corr = REG_GET_FIELD(global_sts, RAS_GLOBAL_STATUS_LO, ParityErrCorr); in nbio_v7_4_query_ras_error_count() 498 fatal = REG_GET_FIELD(global_sts, RAS_GLOBAL_STATUS_LO, ParityErrFatal); in nbio_v7_4_query_ras_error_count() 499 non_fatal = REG_GET_FIELD(global_sts, RAS_GLOBAL_STATUS_LO, in nbio_v7_4_query_ras_error_count() 518 if (REG_GET_FIELD(central_sts, BIFL_RAS_CENTRAL_STATUS, in nbio_v7_4_query_ras_error_count()

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