Searched refs:REG_DSI_28nm_PHY_PLL_GLB_CFG (Results 1 - 4 of 4) sorted by relevance
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/phy/ |
H A D | dsi_phy_28nm.c | 306 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 1); in _dsi_pll_28nm_vco_prepare_hpm() 309 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in _dsi_pll_28nm_vco_prepare_hpm() 312 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 500); in _dsi_pll_28nm_vco_prepare_hpm() 315 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 600); in _dsi_pll_28nm_vco_prepare_hpm() 336 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 1); in _dsi_pll_28nm_vco_prepare_hpm() 339 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in _dsi_pll_28nm_vco_prepare_hpm() 342 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 250); in _dsi_pll_28nm_vco_prepare_hpm() 345 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in _dsi_pll_28nm_vco_prepare_hpm() 348 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 500); in _dsi_pll_28nm_vco_prepare_hpm() 351 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, va in _dsi_pll_28nm_vco_prepare_hpm() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/ |
H A D | dsi_pll_28nm.c | 332 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 1); in dsi_pll_28nm_enable_seq_hpm() 335 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in dsi_pll_28nm_enable_seq_hpm() 338 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 500); in dsi_pll_28nm_enable_seq_hpm() 341 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 600); in dsi_pll_28nm_enable_seq_hpm() 362 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 1); in dsi_pll_28nm_enable_seq_hpm() 365 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in dsi_pll_28nm_enable_seq_hpm() 368 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 250); in dsi_pll_28nm_enable_seq_hpm() 371 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in dsi_pll_28nm_enable_seq_hpm() 374 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 500); in dsi_pll_28nm_enable_seq_hpm() 377 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, va in dsi_pll_28nm_enable_seq_hpm() [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/ |
H A D | dsi_phy_28nm.xml.h | 254 #define REG_DSI_28nm_PHY_PLL_GLB_CFG 0x00000020 macro
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/ |
H A D | dsi.xml.h | 1158 #define REG_DSI_28nm_PHY_PLL_GLB_CFG 0x00000020 macro
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