Home
last modified time | relevance | path

Searched refs:REG_DSI_10nm_PHY_CMN_CTRL_0 (Results 1 - 5 of 5) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_10nm.c120 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_enable()
165 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, 0x7f); in dsi_10nm_phy_enable()
168 data = dsi_phy_read(base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_10nm_phy_enable()
172 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_enable()
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_10nm.c308 u32 data = dsi_phy_read(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()
311 dsi_phy_write(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_disable_pll_bias()
318 u32 data = dsi_phy_read(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()
320 dsi_phy_write(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_enable_pll_bias()
836 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_enable()
882 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, 0x7f); in dsi_10nm_phy_enable()
885 data = dsi_phy_read(base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_10nm_phy_enable()
889 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_enable()
921 data = dsi_phy_read(base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_10nm_phy_disable()
925 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, dat in dsi_10nm_phy_disable()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/
H A Ddsi_phy_10nm.xml.h74 #define REG_DSI_10nm_PHY_CMN_CTRL_0 0x00000024 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/
H A Ddsi_pll_10nm.c368 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()
371 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_disable_pll_bias()
378 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()
380 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_enable_pll_bias()
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/
H A Ddsi.xml.h1737 #define REG_DSI_10nm_PHY_CMN_CTRL_0 0x00000024 macro

Completed in 10 milliseconds