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Searched
refs:REG_DIV
(Results
1 - 1
of
1
) sorted by relevance
/kernel/linux/linux-6.6/drivers/clk/
H
A
D
clk-apple-nco.c
25
#define
REG_DIV
4
macro
35
* The
REG_DIV
register indirectly expresses a base integer divisor, roughly
41
* Specifically an output clock cycle is produced after (
REG_DIV
divisor)/2
42
* or (
REG_DIV
divisor + 1)/2 input cycles, the latter taking effect when top
49
* are programmed into
REG_DIV
by picking an appropriate LFSR state. See
175
writel_relaxed(div, chan->base +
REG_DIV
);
in applnco_set_rate()
196
readl_relaxed(chan->base +
REG_DIV
));
in applnco_recalc_rate()
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