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Help
Searched
refs:REG_CON0
(Results
1 - 2
of
2
) sorted by relevance
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H
A
D
clk-pll.c
16
#define
REG_CON0
0
macro
59
return (readl(pll->base_addr +
REG_CON0
) & CON0_BASE_EN) != 0;
in mtk_pll_is_prepared()
250
r = readl(pll->base_addr +
REG_CON0
);
in mtk_pll_prepare()
252
writel(r, pll->base_addr +
REG_CON0
);
in mtk_pll_prepare()
259
r = readl(pll->base_addr +
REG_CON0
);
in mtk_pll_prepare()
261
writel(r, pll->base_addr +
REG_CON0
);
in mtk_pll_prepare()
273
r = readl(pll->base_addr +
REG_CON0
);
in mtk_pll_unprepare()
275
writel(r, pll->base_addr +
REG_CON0
);
in mtk_pll_unprepare()
280
r = readl(pll->base_addr +
REG_CON0
);
in mtk_pll_unprepare()
282
writel(r, pll->base_addr +
REG_CON0
);
in mtk_pll_unprepare()
[all...]
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H
A
D
clk-pll.c
20
#define
REG_CON0
0
macro
231
r = readl(pll->base_addr +
REG_CON0
) | pll->data->en_mask;
in mtk_pll_prepare()
232
writel(r, pll->base_addr +
REG_CON0
);
in mtk_pll_prepare()
240
r = readl(pll->base_addr +
REG_CON0
);
in mtk_pll_prepare()
242
writel(r, pll->base_addr +
REG_CON0
);
in mtk_pll_prepare()
254
r = readl(pll->base_addr +
REG_CON0
);
in mtk_pll_unprepare()
256
writel(r, pll->base_addr +
REG_CON0
);
in mtk_pll_unprepare()
262
r = readl(pll->base_addr +
REG_CON0
) & ~pll->data->en_mask;
in mtk_pll_unprepare()
263
writel(r, pll->base_addr +
REG_CON0
);
in mtk_pll_unprepare()
309
pll->en_addr = pll->base_addr +
REG_CON0
;
in mtk_clk_register_pll_ops()
[all...]
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