Searched refs:REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.c | 567 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR, 0x30010); in a6xx_gmu_rpmh_init()
570 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR + 4, 0x30000); in a6xx_gmu_rpmh_init()
574 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR + 8, pdc_address_offset); in a6xx_gmu_rpmh_init()
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| H A D | a6xx.xml.h | 7486 #define REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR 0x00001576 macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.c | 584 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR, 0x30010); in a6xx_gmu_rpmh_init()
587 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR + 4, 0x30000); in a6xx_gmu_rpmh_init()
591 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR + 8, pdc_address_offset); in a6xx_gmu_rpmh_init()
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| H A D | a6xx.xml.h | 8053 #define REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR 0x00001576 macro
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